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74LVC2G125DP Arkusz danych(PDF) 10 Page - NXP Semiconductors

Numer części 74LVC2G125DP
Szczegółowy opis  Dual bus buffer/line driver; 3-state
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Producent  NXP [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo NXP - NXP Semiconductors

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74LVC2G125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 11 — 9 September 2010
10 of 22
NXP Semiconductors
74LVC2G125
Dual bus buffer/line driver; 3-state
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 9.
Test circuit for measuring switching times
VEXT
VCC
VI
VO
001aae235
DUT
CL
RT
RL
RL
PULSE
GENERATOR
VM
VM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VM
VM
90 %
10 %
tf
tr
tr
tf
Table 10.
Test data
Supply voltage
Input
Load
VEXT
VCC
VI
tr, tf
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
1.65 V to 1.95 V
VCC
≤ 2.0ns
30pF
1 k
Ω
open
GND
2VCC
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500
Ω
open
GND
2VCC
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500
Ω
open
GND
6 V
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500
Ω
open
GND
6 V
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500
Ω
open
GND
2VCC


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