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LM2925T Arkusz danych(PDF) 8 Page - HTC Korea TAEJIN Technology Co.

Numer części LM2925T
Szczegółowy opis  Low Dropout Regulator with Delayed Reset
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Producent  HTC [HTC Korea TAEJIN Technology Co.]
Strona internetowa  http://www.htckorea.co.kr
Logo HTC - HTC Korea TAEJIN Technology Co.

LM2925T Arkusz danych(HTML) 8 Page - HTC Korea TAEJIN Technology Co.

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Low Dropout Regulator with Delayed Reset
LM2925
HTC
8 −
APPLICATION HINT
EXTERNAL CAPACITORS
The LM2925 output capacitoris required for stability. Without it, the regulator output will oscillate,
sometimes by many volts. Though the 10µF shown is the minimum recom-mended value,actual size
and type may vary depending upon the application load and temperature range. Capacitor effective
series resistance (ESR) also effects the IC stability.
Since ESR varies from one brand to the next, some bench work may be required to determine the
minimum capacitor value to use in production. Worst-case is usually determined at the minimum
junction and ambient temperature and maxi- mum load expected.
Output capacitors can be increased in size to any desired value above the minimum. One possible
purpose of this would be to maintain the output voltages during brief condi-tions of negative input
transients that might be characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures expected in the system. Many aluminum
type electrolytics will freeze at temperatures less than −30°C, reducing their effective capacitance to
zero. To maintain regulator stability down to −40°C, capacitors rated at that temperature (such as
tantalums) must be used.
RESET OUTPUT
The range of values for the delay capacitor is limited only by stray capacitances on the lower extreme
and capacitance leakage on the other. Thus, delay times from microseconds to seconds are possible.
The low charging current, typically 2.0 microamps, allows the use of small, inexpensive disc ca-
pacitors for the nominal range of 100 to 500 milliseconds. This is the time required in many
microprocessor systems for the clock oscillator to stabilize when initially powered up.
The RESET output of the regulator will thus prevent erroneous data and/or timing functions to occur
during this part of op-eration The same delay is incorporated after any other fault condition in the
regulator output is corrected.


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