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GS1532-CF Arkusz danych(PDF) 6 Page - Gennum Corporation |
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GS1532-CF Arkusz danych(HTML) 6 Page - Gennum Corporation |
6 / 51 page GS1532 Data Sheet 21498 - 8 February 2007 6 of 51 1.2 Pin Descriptions Table 1-1: Pin Descriptions Pin Number Name Timing Type Description 1 CP_VDD – Power Power supply connection for the charge pump. Connect to +3.3V DC analog. 2 PD_GND – Power Ground connection for the phase detector. Connect to analog GND. 3 PD_VDD – Power Power supply connection for the phase detector. Connect to +1.8V DC analog. 4, 6-8, 10, 14-17, 31, 65, 66, 70, 71 NC – – No connect. 5 RSV – – Reserved. Connect to Analog GND. 9 DVB_ASI Non Synchronous Input CONTROL SIGNAL INPUT Signal levels are LVCMOS/LVTTL compatible. When set HIGH in conjunction with SD/HD = HIGH and SMPTE_BYPASS = LOW, the device will be configured to operate in DVB-ASI mode. When set LOW, the device will not support the encoding of received DVB-ASI data. 11 SD/HD Non Synchronous Input CONTROL SIGNAL INPUT Signal levels are LVCMOS/LVTTL compatible. When set LOW, the device will be configured to transmit signal rates of 1.485Gb/s or 1.485/1.001Gb/s only. When set HIGH, the device will be configured to transmit signal rates of 270Mb/s only. 12 20bit/10bit Non Synchronous Input CONTROL SIGNAL INPUT Signal levels are LVCMOS/LVTTL compatible. Used to select the input data bus width in SMPTE or Data-Through modes. This signal is ignored in DVB-ASI mode. When set HIGH, the parallel input will be 20-bit demultiplexed data. When set LOW, the parallel input will be 10-bit multiplexed data. |
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