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ADS5263IRGCT Arkusz danych(PDF) 6 Page - Texas Instruments

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Numer części ADS5263IRGCT
Szczegółowy opis  Quad Channel 16-Bit, 100-MSPS High-SNR ADC
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

ADS5263IRGCT Arkusz danych(HTML) 6 Page - Texas Instruments

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ADS5263
SLAS760B
– MAY 2011 – REVISED OCTOBER 2011
www.ti.com
PIN FUNCTIONS (continued)
PIN
NO. OF
PIN NAME
DESCRIPTION
PINS
TYPE
NO.
IN4B_P, IN4B_M
Differential analog input for channel 4, 14 bit ADC
I
44, 45
2
INT/EXT
Internal/external reference mode select input
I
56
1
Logic HIGH
–internal reference
Logic LOW
– external reference
ISET
Bias pin
– 56.2 kΩ resistor (1% tolerance value) to ground
I
51
1
LCLKM
LVDS bit clock (8X)
– negative output
O
26
1
LCLKP
LVDS bit clock (8X)
– positive output
O
25
1
LGND
Digital ground
I
12, 14, 36
3
LVDD
Digital and I/O power supply, 1.8 V
I
35
1
OUT1P, OUT1M
Wire 1, channel 1 LVDS differential output
O
15, 16
2
OUT2P, OUT2M
Wire 2, channel 1 LVDS differential output
O
17, 18
2
OUT3P, OUT3M
Wire 1, channel 2, LVDS differential output
O
19, 20
2
OUT4P, OUT4M
Wire 2, channel 2 LVDS differential output
O
21, 22
2
OUT5P, OUT5M
Wire 1, channel 3 LVDS differential output
O
27, 28
2
OUT6P, OUT6M
Wire 2, channel 3 LVDS differential output
O
29, 30
2
OUT7P, OUT7M
Wire 1, channel 4 LVDS differential output
O
31, 32
2
OUT8P, OUT8M
Wire 2, channel 4 LVDS differential output
O
33, 34
2
PD
Power-down input
I
13
1
REFB
Negative-reference input/output
IO
54
1
REFT
Positive-reference input/output
IO
55
1
RESET
Serial interface RESET input, active LOW.
I
64
1
When using the serial interface mode, the user must initialize internal registers through hardware
RESET by applying a low-going pulse on this pin or by using software reset option. See the Serial
Interface section.
SCLK
Serial interface clock input. The pin has an internal 300-k
Ω pulldown resistor.
I
63
1
SDATA
Serial interface data input. The pin has an internal 300-k
Ω pulldown resistor.
I
62
1
SDOUT
Serial register readout
O
52
1
This pin is in the high-impedance state after reset. When the
<READOUT> bit is set, the SDOUT
pin becomes active. This is a CMOS digital output running from the AVDD supply.
SYNC
Input signal to synchronize channels and chips when used with reduced output data rates
I
49
1
Alternate function: Clamp signal input (14-bit ADC mode only)
VCM
Outputs the common-mode voltage (1.5 V) that can be used externally to bias the analog input
O
53
1
pins.
6
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Copyright
© 2011, Texas Instruments Incorporated
Product Folder Link(s) :ADS5263


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