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DAC34H84IZAY Arkusz danych(PDF) 11 Page - Texas Instruments |
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DAC34H84IZAY Arkusz danych(HTML) 11 Page - Texas Instruments |
11 / 80 page DAC34H84 www.ti.com SLAS751B – MARCH 2011 – REVISED SEPTEMBER 2011 ELECTRICAL CHARACTERISTICS – DIGITAL SPECIFICATIONS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT TIMING SPECIFICATIONS Timing LVDS inputs: DAB[15:0]P/N, DCD[15:0]P/N, ISTRP/N, SYNCP/N, PARITYCDP/N, double edge latching Config36 Setting datadly clkdly 0 0 150 0 1 100 0 2 50 0 3 0 Setup time, 0 4 –50 DAB[15:0]P/N, 0 5 –100 DCD[15:0]P/N, ISTRP/N and SYNCP/N reset latched ts(DATA) ISTRP/N, SYNCP/N, 0 6 –150 ps only on rising edge of DATACLKP/N and PARITYCDP/N, 0 7 –200 valid to either edge of 1 0 200 DATACLKP/N 2 0 250 3 0 300 4 0 350 5 0 400 6 0 450 7 0 500 Config36 Setting datadly clkdly 0 0 400 0 1 450 0 2 500 0 3 550 Hold time, 0 4 600 DAB[15:0]P/N, 0 5 650 DCD[15:0]P/N, ISTRP/N and SYNCP/N reset latched th(DATA) ISTRP/N, SYNCP/N 0 6 700 ps only on rising edge of DATACLKP/N and PARITYCDP/N 0 7 750 valid after either edge 1 0 350 of DATACLKP/N 2 0 300 3 0 250 4 0 200 5 0 150 6 0 100 7 0 50 ISTRP/N and t(ISTR_SYNC) fDATACLK is DATACLK frequency in MHz 1/2fDATACLK ns SYNCP/N pulse width Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): DAC34H84 |
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