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SI6968BEDQ Arkusz danych(PDF) 2 Page - Vishay Siliconix |
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SI6968BEDQ Arkusz danych(HTML) 2 Page - Vishay Siliconix |
2 / 11 page www.vishay.com 2 Document Number: 72274 S-81221-Rev. C, 02-Jun-08 Vishay Siliconix Si6968BEDQ Notes: a. For design aid only; not subject to production testing. b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. Typ.a Max. Unit Static Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 0.6 1.6 V Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 4.5 V ± 200 nA Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V 1 µA VDS = 20 V, VGS = 0 V, TJ = 70 °C 25 On-State Drain Currentb ID(on) VDS ≤ 5 V, VGS = 4.5 V 30 A Drain-Source On-State Resistanceb RDS(on) VGS = 4.5 V, ID = 6.5 A 0.0165 0.022 Ω VGS = 2.5 V, ID = 5.5 A 0.023 0.030 Forward Transconductanceb gfs VDS = 10 V, ID = 6.5 A 30 S Diode Forward Voltageb VSD IS = 1.5 A, VGS = 0 V 0.71 1.2 V Dynamica Total Gate Charge Qg VDS = 10 V, VGS = 4.5 V, ID = 6.5 A 12 18 nC Gate-Source Charge Qgs 2.2 Gate-Drain Charge Qgd 3.6 Turn-On Delay Time td(on) VDD = 10 V, RL = 10 Ω ID ≅ 1 A, VGEN = 4.5 V, RG = 6 Ω 245 365 ns Rise Time tr 330 495 Turn-Off Delay Time td(off) 860 1300 Fall Time tf 510 765 Gate-Current vs. Gate-Source Voltage 0 2 4 6 8 10 0 3 6 9 12 15 18 VGS - Gate-to-Source Voltage (V) Gate Current vs. Gate-Source Voltage 0369 12 15 0.01 100 10000 TJ = 25 °C 0.1 1 10 1000 VGS - Gate-to-Source Voltage (V) TJ = 150 °C |
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