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AD9608BCPZRL7-125 Arkusz danych(PDF) 2 Page - Analog Devices |
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AD9608BCPZRL7-125 Arkusz danych(HTML) 2 Page - Analog Devices |
2 / 40 page AD9608 Rev. 0 | Page 2 of 40 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications..................................................................................... 4 DC Specifications........................................................................... 4 AC Specifications ........................................................................... 5 Digital Specifications ................................................................... 6 Switching Specifications ................................................................ 7 Timing Specifications .................................................................. 8 Absolute Maximum Ratings.......................................................... 10 Thermal Characteristics ............................................................ 10 ESD Caution................................................................................ 10 Pin Configurations and Function Descriptions ......................... 11 Typical Performance Characteristics ........................................... 17 AD9608-125 ................................................................................ 17 AD9608-105 ................................................................................ 20 Equivalent Circuits ......................................................................... 22 Theory of Operation ...................................................................... 23 ADC Architecture ...................................................................... 23 Analog Input Considerations.................................................... 23 Voltage Reference ....................................................................... 25 Clock Input Considerations...................................................... 26 Channel/Chip Synchronization................................................ 28 Power Dissipation and Standby Mode .................................... 28 Digital Outputs ........................................................................... 29 Timing ......................................................................................... 29 Built-In Self-Test (BIST) and Output Test .................................. 30 Built-In Self-Test (BIST)............................................................ 30 Output Test Modes..................................................................... 30 Serial Port Interface (SPI).............................................................. 31 Configuration Using the SPI..................................................... 31 Hardware Interface..................................................................... 32 Configuration Without the SPI ................................................ 32 SPI Accessible Features.............................................................. 32 Memory Map .................................................................................. 33 Reading the Memory Map Register Table............................... 33 Memory Map Register Table..................................................... 34 Memory Map Register Descriptions........................................ 37 Applications Information .............................................................. 39 Design Guidelines ...................................................................... 39 Outline Dimensions ....................................................................... 40 Ordering Guide .......................................................................... 40 REVISION HISTORY 7/11—Revision 0: Initial Version |
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