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AD5755 Arkusz danych(PDF) 9 Page - Analog Devices |
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AD5755 Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 44 page Data Sheet AD5737 Rev. B | Page 9 of 44 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Transient currents of up to 100 mA do not cause SCR latch-up. Table 4. Parameter Rating AVDD, VBOOST_x to AGND, DGND −0.3 V to +33 V AVCC to AGND −0.3 V to +7 V DVDD to DGND −0.3 V to +7 V Digital Inputs to DGND −0.3 V to DVDD + 0.3 V or +7 V (whichever is less) Digital Outputs to DGND −0.3 V to DVDD + 0.3 V or +7 V (whichever is less) REFIN, REFOUT to AGND −0.3 V to AVDD + 0.3 V or +7 V (whichever is less) IOUT_x to AGND AGND to VBOOST_x or 33 V if using the dc-to-dc converter SWx to AGND −0.3 V to +33 V AGND, GNDSWx to DGND −0.3 V to +0.3 V Operating Temperature Range (TA) Industrial1 −40°C to +105°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 125°C Power Dissipation (TJ max − TA)/θJA Lead Temperature JEDEC industry standard Soldering J-STD-020 1 Power dissipated on chip must be derated to keep the junction temperature below 125°C. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE Junction-to-air thermal resistance (θJA) is specified for a JEDEC 4-layer test board. Table 5. Thermal Resistance Package Type θJA Unit 64-Lead LFCSP (CP-64-3) 20 °C/W ESD CAUTION |
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Podobny opis - AD5755 |
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