AD9577 datasheet(3/44 Pages) AD

Numer części	AD9577

Szczegółowy opis	Clock Generator with Dual PLLs

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Data Sheet

AD9577

Rev. 0 | Page 3 of 44

SPECIFICATIONS

Typical (typ) is given for VS = 3.3 V, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given over full

VS (3.0 V to 3.6 V) and TA (−40°C to +85°C) variation. AC coupling capacitors of 0.1 μF used where appropriate. A Fox Electronics

FX532A 25 MHz crystal is used throughout, unless otherwise stated.

PLL1 CHARACTERISTICS

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments1

NOISE CHARACTERISTICS

Phase Noise (106.25 MHz LVPECL Output)

Na = 102, Vx = 4, Dx = 6, fPFD = 25 MHz

At 1 kHz

−121

dBc/Hz

At 10 kHz

−127

dBc/Hz

At 100 kHz

−128

dBc/Hz

At 1 MHz

−150

dBc/Hz

At 10 MHz

−156

dBc/Hz

At 30 MHz

−158

dBc/Hz

Phase Noise (156.25 MHz LVPECL Output)

Na = 100, Vx = 4, Dx = 4, fPFD = 25 MHz

At 1 kHz

−117

dBc/Hz

At 10 kHz

−124

dBc/Hz

At 100 kHz

−124

dBc/Hz

At 1 MHz

−147

dBc/Hz

At 10 MHz

−156

dBc/Hz

At 30 MHz

−156

dBc/Hz

Phase Noise (625 MHz LVPECL Output)

Na = 100, Vx = 2, Dx = 2, fPFD = 25 MHz

At 1 kHz

−105

dBc/Hz

At 10 kHz

−112

dBc/Hz

At 100 kHz

−112

dBc/Hz

At 1 MHz

−135

dBc/Hz

At 10 MHz

−150

dBc/Hz

At 30 MHz

−150

dBc/Hz

Phase Noise (106.25 MHz LVDS Output)

Na = 102, Vx = 4, Dx = 6, fPFD = 25 MHz

At 1 kHz

−119

dBc/Hz

At 10 kHz

−127

dBc/Hz

At 100 kHz

−128

dBc/Hz

At 1 MHz

−148

dBc/Hz

At 10 MHz

−156

dBc/Hz

At 30 MHz

−156

dBc/Hz

Phase Noise (156.25 MHz LVDS Output)

Na = 100, Vx = 4, Dx = 4, fPFD = 25 MHz

At 1 kHz

−116

dBc/Hz

At 10 kHz

−124

dBc/Hz

At 100 kHz

−124

dBc/Hz

At 1 MHz

−145

dBc/Hz

At 10 MHz

−155

dBc/Hz

At 30 MHz

−155

dBc/Hz

Phase Noise (625 MHz LVDS Output)

Na = 100, Vx = 2, Dx = 2, fPFD = 25 MHz

At 1 kHz

−104

dBc/Hz

At 10 kHz

−111

dBc/Hz

At 100 kHz

−112

dBc/Hz

At 1 MHz

−134

dBc/Hz

At 10 MHz

−149

dBc/Hz

At 30 MHz

−149

dBc/Hz

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