AD9577BCPZ-R7 datasheet(2/44 Pages) AD

Numer części	AD9577BCPZ-R7

Szczegółowy opis	Clock Generator with Dual PLLs

Download	44 Pages

Scroll/Zoom	100%

Producent	AD [Analog Devices]

Strona internetowa	http://www.analog.com

Logo

2 / 44 page

AD9577

Data Sheet

Rev. 0 | Page 2 of 44

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

PLL1 Characteristics .................................................................... 3

PLL1 Clock Output Jitter............................................................. 5

PLL2 Fractional-N Mode Characteristics ................................. 6

PLL2 Integer-N Mode Characteristics....................................... 7

PLL2 Clock Output Jitter............................................................. 9

CMOS Reference Clock Output Jitter...................................... 11

Timing Characteristics .............................................................. 12

Clock Outputs ............................................................................. 13

Power............................................................................................ 14

Crystal Oscillator........................................................................ 15

Reference Input........................................................................... 15

Control Pins ................................................................................ 15

Absolute Maximum Ratings.......................................................... 16

Thermal Characteristics ............................................................ 16

ESD Caution................................................................................ 16

Pin Configuration and Function Descriptions........................... 17

Typical Performance Characteristics ........................................... 19

REFOUT and PLL1 Phase Noise Performance ...................... 19

PLL2 Phase Noise Performance................................................ 20

Output Jitter ................................................................................ 21

Typical Output Signal ................................................................ 22

Typical Spread Spectrum Performance Characteristics ........ 24

Terminology .................................................................................... 25

Detailed Block Diagram ................................................................ 27

Example Application.................................................................. 28

Functional Description.................................................................. 29

Reference Input and Reference Dividers................................. 29

Output Channel Dividers.......................................................... 30

Outputs ........................................................................................ 30

Reference Output Buffer ........................................................... 31

PLL1 Integer-N PLL................................................................... 31

PLL1 Phase Frequency Detector (PFD) and Charge Pump . 32

PLL1 VCO ................................................................................... 32

PLL1 Feedback Divider ............................................................. 32

Setting the Output Frequency of PLL1.................................... 32

PLL2 Integer/Fractional-N PLL ............................................... 32

PLL2 Phase Frequency Detector (PFD) and Charge Pump . 33

PLL2 Loop Bandwidth............................................................... 33

PLL2 VCO ................................................................................... 33

PLL2 Feedback Divider ............................................................. 33

PLL2 Σ-Δ Modulator ................................................................. 33

Spur Mechanisms ....................................................................... 33

Optimizing PLL Performance .................................................. 34

Setting the Output Frequency of PLL2.................................... 34

Margining .................................................................................... 35

Spread Spectrum Clock Generation (SSCG).......................... 35

I2C Interface Timing and Internal Register Description........... 38

Default Frequency Map and Output Formats ........................ 40

I2C Interface Operation ............................................................. 40

Typical Application Circuits ..................................................... 42

Power and Grounding Considerations and Power Supply

Rejection...................................................................................... 43

Outline Dimensions ....................................................................... 44

Ordering Guide .......................................................................... 44

REVISION HISTORY

10/11—Revision 0: Initial Version

Podobny numer części - AD9577BCPZ-R7

Producent	Numer części	Arkusz danych	Szczegółowy opis
Analog Devices	AD9577BCPZ-R7	746Kb / 44P	Clock Generator with Dual PLLs, Spread Spectrum, and Margining

More results

Podobny opis - AD9577BCPZ-R7

Producent	Numer części	Arkusz danych	Szczegółowy opis
Nippon Precision Circui...	SM8707	133Kb / 20P	Clock Generator with Dual PLLs
Nippon Precision Circui...	SM8707E	380Kb / 12P	Clock Generator with Dual PLLs
Analog Devices	AD9577	746Kb / 44P	Clock Generator with Dual PLLs, Spread Spectrum, and Margining
Texas Instruments	CDC5806	340Kb / 13P	[Old version datasheet] THREE PLLs BASED CLOCK GENERATOR
Integrated Circuit Syst...	MK2049-02	148Kb / 12P	Communications Clock PLLs
Maxim Integrated Produc...	MAX9471	3Mb / 13P	Multiple-Output Clock Generators with Dual PLLs and OTP Rev 1; 8/06
Texas Instruments	LMK04208	1Mb / 138P	[Old version datasheet] Low-Noise Clock Jitter Cleaner with Dual Loop PLLs
	CDC5806	112Kb / 8P	[Old version datasheet] THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS
	LMK04100EVAL	1Mb / 47P	[Old version datasheet] Precision Clock Conditioner with Dual PLLs and Integrated VCO
National Semiconductor ...	LMK04800	3Mb / 79P	Low-Noise Clock Jitter Cleaner with Dual Loop PLLs

More results

AD9577BCPZ-R7 Arkusz danych(PDF) 2 Page - Analog Devices

AD9577BCPZ-R7 Arkusz danych(HTML) 2 Page - Analog Devices

Podobny numer części - AD9577BCPZ-R7

Podobny opis - AD9577BCPZ-R7

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Arkusz danych Pobierz

Link URL