ADL5511

Data Sheet

Rev. A | Page 8 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NOTES

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED PAD SHOULD BE CONNECTED

TO BOTH THERMAL AND ELECTRICAL GROUNDS.

PIN 1

INDICATOR

1

FLT3

2

RFIN

3

FLT1

4

ENBL

11

VRMS

12 NC

10 VENV

9 EREF

TOP VIEW

(Not to Scale)

ADL5511

Figure 3. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 16

FLT3, FLT2

External Envelope Filter. With the FLT3 and FLT2 pins not connected, two internal low-pass filters (operating

in series) with corner frequencies of approximately 1000 MHz and 800 MHz remove the residual RF carrier (at

two times the original input frequency) from the envelope signal. External, supply-referenced capacitors

connected to FLT3 and FLT2 can be used to reduce this corner frequency. See the Basic Connections section

for more information.

2

RFIN

RF Input. RFIN should be externally ac-coupled. RFIN has a nominal input impedance of 250 Ω. To achieve a

broadband 50 Ω input impedance, an external 75 Ω shunt resistor should be connected between the source

side of the ac coupling capacitor and ground.

3

FLT1

External Envelope Filter. A capacitor to ground on this pin can be used to reduce the nominal minimum

input frequency. The capacitance on this pin helps to reduce any residual RF carrier presence on the EREF

output pin. See the Basic Connections section for more information.

4

ENBL

Device Enable/Disable. A logic high on this pin enables the device. A logic low on this pin disables the

device.

5

COMM

Device Ground. Connect to a low impedance ground plane.

6, 7, 8, 12, 13

NC

Do not connect to these pins.

9

EREF

Reference Voltage for Envelope Output. The nominal value is 1.1 V.

10

VENV

Envelope Output. The voltage on this pin represents the envelope of the input signal and is referred to

EREF. VENV can source a current of up to 15 mA. Capacitive loading should not exceed 10 pF to achieve the

specified envelope bandwidth. Lighter loads should be chosen when possible. The nominal output voltages

on EREF and VENV with no signal present track with temperature. For dc-coupled envelope output, EREF

envelope output, the VENV pin can drive a 50 Ω load, if maximum current drive capability of 15 mA is not

exceeded. See the Output Drive Capability and Buffering section for more information.

11

VRMS

in-V/V transfer function with a nominal slope of 2 V/V.

14

FLT4

RMS Averaging Capacitor. Connect between FLT4 and VPOS.

15

VPOS

Supply Voltage Pin. Operational range is 4.75 V to 5.25 V with a supply current of 21.5 mA.

0

EP

Exposed Pad. The exposed pad should be connected to both thermal and electrical grounds.