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ADP5061 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części ADP5061
Szczegółowy opis  Tiny I2C Programmable Linear Battery Charger
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ADP5061 Arkusz danych(HTML) 8 Page - Analog Devices

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ADP5061
Data Sheet
Rev. 0 | Page 8 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Name
Type1
Description
E2, D2, C2
ISO_S1, ISO_S2,
ISO_S3
I/O
Linear Charger Supply Side Input to the Internal Isolation FET/Battery Current Regulation FET.
High current input/output.
E3, D3, C3
VIN1, VIN2, VIN3
I/O
Power Connections to USB VBUS. These pins are high current inputs when in charging mode.
B1
AGND
G
Analog Ground.
E1, D1, C1
ISO_B1, ISO_B2,
ISO_B3
I/O
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
A4
SCL
I
I2C-Compatible Interface Serial Clock.
A3
SDA
I/O
I2C-Compatible Interface Serial Data.
E4
DIG_IO1
GPIO
Set Input Current Limit. This pin sets the input current limit directly. When DIG_IO1 = low or
high-Z, the input limit is 100 mA. When DIG_IO1 = high, the input limit is 500 mA.2, 3
C4
DIG_IO2
GPIO
Disable IC1. This pin sets the charger to the low current mode. When DIG_IO2 = low or high-Z, the
charger operates in normal mode. When DIG_IO2 = high, the LDO and the charger are disabled
and VINx current consumption is 280 µA (typical). 20 V VINx input protection is disabled and VINx
voltage level must be equal to or lower than 5.5 V.2, 3
B4
DIG_IO3
GPIO
Enable Charging. When DIG_IO3 = low or high-Z, charging is disabled. When DIG_IO3 = high,
charging is enabled.2, 3
B2
THR
I
Battery Pack Thermistor Connection. If this pin is not used, connect a dummy 10 kΩ resistor from THR
to GND.
D4
BAT_SNS
I
Battery Voltage Sense Pin.
A1
ILED
O
Open-Drain Output to Indicator LED.
A2
SYS_EN
O
System Enable. This is the battery OK flag/open-drain pull-down FET pin to enable the system
when the battery level reaches the VWEAK level.
B3
CBP
I/O
Bypass Capacitor Input.
1
I is input, O is output, I/O is input/output, G is ground, and GPIO is factory programmable general-purpose input/output.
2
See the Digital Input and Output Options section for details.
3
DIG_IOx setting defines the initial state of the ADP5061. When the parameter or the mode that is related to each DIG_IOx pin setting is changed (by programming the
equivalent I2C register bit or bits), the I2C register setting dominates over the DIG_IOx pin setting. VINx connection or disconnection resets control to the DIG_IOx pin.
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
1
A
B
C
D
E
2
3
4
BALL A1 CORNER
ILED
AGND
ISO_B3
ISO_B2
SDA
CBP
VIN3
VIN2
SCL
DIG_IO3
DIG_IO2
BAT_SNS
SYS_EN
THR
ISO_S3
ISO_S2
ISO_B1
VIN1
DIG_IO1
ISO_S1


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