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ADP2325ACPZ-R7 Arkusz danych(PDF) 1 Page - Analog Devices

Numer części ADP2325ACPZ-R7
Szczegółowy opis  Dual 5 A, 20 V Synchronous Step-Down
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ADP2325ACPZ-R7 Arkusz danych(HTML) 1 Page - Analog Devices

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Dual 5 A, 20 V Synchronous Step-Down
Regulator with Integrated High-Side MOSFET
Data Sheet
ADP2325
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
FEATURES
Input voltage: 4.5 V to 20 V
±1% output accuracy
Integrated 48 mΩ typical high-side MOSFET
Flexible output configuration
Dual output: 5 A/5 A
Parallel single output: 10 A
Programmable switching frequency: 250 kHz to 1.2 MHz
External synchronization input with programmable phase
shift or internal clock output
Selectable PWM or PFM mode operation
Adjustable current limit for small inductors
External compensation and soft start
Startup into precharged output
Supported by ADIsimPowerTM design tool
APPLICATIONS
Communications infrastructure
Networking and servers
Industrial and instrumentation
Healthcare and medical
Intermediate power rail conversion
TYPICAL APPLICATION CIRCUIT
Figure 1.
GENERAL DESCRIPTION
The ADP2325 is a full featured, dual output, step-down dc-to-dc
regulator based on a current mode architecture. The ADP2325
integrates two high-side power MOSFETs and two low-side drivers
for the external N-channel MOSFETs. The two pulse-width mod-
ulation (PWM) channels can be configured to deliver dual 5 A
outputs or a parallel-to-single 10 A output. The regulator operates
from input voltages of 4.5 V to 20 V, and the output voltage can
be as low as 0.6 V.
The switching frequency can be programmed from 250 kHz to
1.2 MHz, or it can be synchronized to an external clock to
minimize interference in multirail applications. The dual PWM
channels run 180° out of phase, thereby reducing input current
ripple as well as reducing the size of the input capacitor.
The bidirectional synchronization pin can be programmed at
a 60°, 90°, or 120° phase shift to provide for a stackable, multi-
phase power solution.
The ADP2325 can be configured to operate in pulse frequency
modulation (PFM) mode at a light load for higher efficiency or
in forced PWM mode for noise sensitive applications. External
compensation and soft start provide design flexibility.
Independent enable inputs and power-good outputs provide
reliable power sequencing. To enhance system reliability, the device
includes undervoltage lockout (UVLO), overvoltage protection
(OVP), overcurrent protection, and thermal shutdown.
The ADP2325 operates over the −40°C to +125°C junction
temperature range and is available in a 32-lead LFCSP_WQ
package.
Figure 2. Efficiency vs. Output Current at VIN = 12 V, fSW = 600 kHz
SW1
DL1
PGND
SW2
DL2
PGOOD1
PGOOD2
GND
SYNC
SCFG
INTVCC
RT
VDRV
VOUT1
VOUT2
VIN
ADP2325
L1
L2
COUT1
COUT2
CIN1
M1
M2
ROSC
CBST1
CSS2
CC2
RC2
RTOP1
RBOT2
RTOP2
CINT
CDRV
TRK1
TRK2
MODE
VIN
CIN2
CBST2
RBOT1
RC1
CC1
CSS1
50
55
60
65
70
75
80
85
90
95
100
0
1.0
2.0
3.0
4.0
0.5
1.5
2.5
3.5
4.5
5.0
OUTPUT CURRENT (A)
VOUT = 5.0V
VOUT = 3.3V


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