Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

74AC11874DW Arkusz danych(PDF) 5 Page - Texas Instruments

Numer części 74AC11874DW
Szczegółowy opis  DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS
Download  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

74AC11874DW Arkusz danych(HTML) 5 Page - Texas Instruments

  74AC11874DW Datasheet HTML 1Page - Texas Instruments 74AC11874DW Datasheet HTML 2Page - Texas Instruments 74AC11874DW Datasheet HTML 3Page - Texas Instruments 74AC11874DW Datasheet HTML 4Page - Texas Instruments 74AC11874DW Datasheet HTML 5Page - Texas Instruments 74AC11874DW Datasheet HTML 6Page - Texas Instruments 74AC11874DW Datasheet HTML 7Page - Texas Instruments  
Zoom Inzoom in Zoom Outzoom out
 5 / 7 page
background image
74AC11874
DUAL 4BIT DTYPE EDGETRIGGERED FLIPFLOP
WITH 3STATE OUTPUTS
SCAS236 − MARCH 1990 − REVISED APRIL 1993
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per flip-flop
Outputs enabled
CL = 50 pF,
f = 1 MHz
31
pF
Cpd
Power dissipation capacitance per flip-flop
Outputs disabled
CL = 50 pF,
f = 1 MHz
13
pF
PARAMETER MEASUREMENT INFORMATION
th
tsu
From Output
Under Test
CL = 50 pF
LOAD CIRCUIT FOR OUTPUTS
S1
2
× VCC
Open
GND
500
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2
× VCC
GND
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
× VCC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
50%
50%
≈ VCC
0 V
50% VCC
0 V
VCC
Data Input
Timing Input
50%
VCC
0 V
50%
50%
0 V
VCC
0 V
50%
50%
tw
Input
(see Note A)
50% VCC
20% VCC
80% VCC
tPLH
tPHL
50%
50%
0 V
50% VCC
50% VCC
VOH
VOL
Input
(see Note B)
Output
(see Note D)
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VCC
VCC
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms


Podobny numer części - 74AC11874DW

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Texas Instruments
74AC11873 TI1-74AC11873 Datasheet
111Kb / 8P
[Old version datasheet]   DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS
logo
NXP Semiconductors
74AC11873D PHILIPS-74AC11873D Datasheet
337Kb / 12P
   SIGNETICS
October 17 1990
logo
Texas Instruments
74AC11873DW TI1-74AC11873DW Datasheet
111Kb / 8P
[Old version datasheet]   DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS
logo
NXP Semiconductors
74AC11873N PHILIPS-74AC11873N Datasheet
337Kb / 12P
   SIGNETICS
October 17 1990
logo
Texas Instruments
74AC11873NT TI1-74AC11873NT Datasheet
111Kb / 8P
[Old version datasheet]   DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS
More results

Podobny opis - 74AC11874DW

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Fairchild Semiconductor
DM74ALS874B FAIRCHILD-DM74ALS874B Datasheet
56Kb / 6P
   Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs
DM74ALS874B FAIRCHILD-DM74ALS874B_01 Datasheet
62Kb / 6P
   Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs
logo
Texas Instruments
SN74LVCH32374A TI-SN74LVCH32374A Datasheet
131Kb / 9P
[Old version datasheet]   32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH162374 TI-SN74ALVCH162374_04 Datasheet
318Kb / 13P
[Old version datasheet]   16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVC16374 TI-SN74LVC16374 Datasheet
97Kb / 6P
[Old version datasheet]   16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74AVC16374 TI-SN74AVC16374_06 Datasheet
369Kb / 18P
[Old version datasheet]   16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVCH16374A TI1-SN74LVCH16374A_14 Datasheet
918Kb / 24P
[Old version datasheet]   16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
SN74AUC16374 TI-SN74AUC16374 Datasheet
299Kb / 12P
[Old version datasheet]   16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVCH16374A TI-SN74LVCH16374A_07 Datasheet
392Kb / 18P
[Old version datasheet]   16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74AUC32374 TI1-SN74AUC32374 Datasheet
412Kb / 13P
[Old version datasheet]   32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
More results


Html Pages

1 2 3 4 5 6 7


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com