CDCLVP1204 datasheet(4/22 Pages) TI1

Numer części	CDCLVP1204

Szczegółowy opis	Two LVPECL Output, High-Performance Clock Buffer

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CDCLVP1102

SCAS884C

– AUGUST 2009 – REVISED AUGUST 2011

www.ti.com

ELECTRICAL CHARACTERISTICS: LVPECL Output

(1)

At VCC = 2.375 V to 2.625 V and TA = –40°C to +85°C (unless otherwise noted).

CDCLVP1102

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

Output high voltage

VCC – 1.26

VCC – 0.9

V

VOL

Output low voltage

VCC – 1.7

VCC – 1.3

V

VOUT, DIFF, PP

Differential output peak-peak voltage

fIN ≤ 2 GHz

0.5

1.35

V

VAC_REF

Input bias voltage(2)

IAC_REF = 2 mA

VCC – 1.6

VCC – 1.1

V

VIN, DIFF, PP = 0.1V

450

ps

tPD

Propagation delay

VIN, DIFF, PP = 0.3V

450

ps

tSK,PP

Part-to-part skew

100

ps

tSK,O

Output skew

10

ps

Crossing-point-to-crossing-point

tSK,P

Pulse skew (with 50% duty cycle input)

–50

50

ps

distortion, fOUT = 100 MHz

fOUT = 100 MHz, VIN,SE = VCC,

0.089

ps, RMS

Vth = 1.25 V, 10 kHz to 20 MHz

fOUT = 100 MHz, VIN,SE = 0.9 V,

0.093

ps, RMS

Vth = 1.1 V, 10 kHz to 20 MHz

Random additive jitter (with 50% duty

fOUT = 2 GHz, VIN,DIFF,PP = 0.2 V,

tRJIT

0.037

ps, RMS

cycle input)

VICM = 1 V, 10 kHz to 20 MHz

fOUT = 100 MHz, VIN,DIFF,PP = 0.15 V,

0.094

ps, RMS

VICM = 1 V, 10 kHz to 20 MHz

fOUT = 100 MHz, VIN,DIFF,PP = 1 V,

0.091

ps, RMS

VICM = 1 V, 10 kHz to 20 MHz

tR/tF

Output rise/fall time

20% to 80%

200

ps

IEE

Supply internal current

Outputs unterminated

33

mA

ICC

Output and internal supply current

All outputs terminated, 50

Ω to VCC – 2

100

mA

(1)

Figure 8 and Figure 9 show dc and ac test setup.

(2)

Internally generated bias voltage (VAC_REF) is for 3.3-V operation only. It is recommended to apply externally generated bias voltage for

VCC < 3.0 V.

4

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