SN74GTL2010 datasheet(10/18 Pages) TI1

Numer części	SN74GTL2010

Szczegółowy opis	10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR

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Producent	TI1 [Texas Instruments]

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Unidirectional Down Translation

S

REF

D

REF

G

REF

SW

GTL2010

D1

S1

D2

S2

Sn

GND

Dn

V

=5V

DPU

V

=1.8V

REF

200K

CPUI/O

Chipset

I/O

GTL2010

10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR

SCDS221 – SEPTEMBER 2006

APPLICATION INFORMATION (continued)

For unidirectional clamping (higher voltage to lower voltage), the GREF input must be connected to DREF and both

pins pulled to the higher-side VCC through a pullup resistor (typically 200 kΩ). A filter capacitor on DREF is

recommended. Pullup resistors are required if the chipset I/Os are open drain. The opposite side of the

reference transistor (SREF) is connected to the processor core power-supply voltage. When DREF is connected

through a 200-k

Ω resistor to a 3.3-V to 5.5-V V

CC supply and SREF is set between 1 V to VCC – 1.5 V, the output

of each Sn has a maximum output voltage equal to SREF.

Figure 6. Unidirectional Down Translation to Protect Low-Voltage Processor Pins

10

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