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ADC1610S065HN-C1 Arkusz danych(PDF) 7 Page - Integrated Device Technology |
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7 / 38 page ADC1610S_SER 4 © IDT 2012. All rights reserved. Product data sheet Rev. 04 — 2 July 2012 7 of 38 Integrated Device Technology ADC1610S series Single 16-bit ADC; CMOS or LVDS DDR digital output Digital outputs, CMOS mode: pins D15 to D0, OTR, DAV Output levels, VDDO =3V VOL LOW-level output voltage OGND - 0.2VDDO V VOH HIGH-level output voltage 0.8VDDO -VDDO V CO output capacitance high impedance; OE =HIGH - 3 - pF Output levels, VDDO = 1.8 V VOL LOW-level output voltage OGND - 0.2VDDO V VOH HIGH-level output voltage 0.8VDDO -VDDO V Digital outputs, LVDS mode: pins D14_D15_P to D0_D1_P, D14_D15_M to D0_D1_M, DAVP and DAVM Output levels, VDDO = 3 V only, RL = 100 VO(offset) output offset voltage output buffer current set to 3.5 mA -1.2 - V VO(dif) differential output voltage output buffer current set to 3.5 mA -350 - mV CO output capacitance - 3 - pF Analog inputs: pins INP and INM II input current 5- +5 A Ri(dif) differential input resistance - 19.8 - k Ci(dif) differential input capacitance - 2.8 - pF VI(cm) common-mode input voltage VINP =VINM 1.1 1.5 2.5 V Bi input bandwidth - 650 - MHz VI(dif) differential input voltage peak-to-peak 1 - 2 V Common-mode output voltage: pin VCM VO(cm) common-mode output voltage - VDDA /2 - V IO(cm) common-mode output current - 4 - mA I/O reference voltage: pin VREF VVREF voltage on pin VREF output 0.5 - 1 V input 0.5 - 1 V Accuracy INL integral non-linearity - 4- LSB DNL differential non-linearity guaranteed no missing codes 0.95 0.5 +0.95 LSB Eoffset offset error - 2- mV EG gain error full-scale - 0.5 - % Table 6. Static characteristics[1] …continued Symbol Parameter Conditions Min Typ Max Unit |
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