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CSD17303Q5 Arkusz danych(PDF) 8 Page - Texas Instruments |
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CSD17303Q5 Arkusz danych(HTML) 8 Page - Texas Instruments |
8 / 23 page Configurations www.ti.com 1. Connect the load to J5 and set the load to constant-resistance mode to sink 0 Adc before V5IN and VIN are applied. 2. Connect a voltmeter V3 at TP11 (VDDQ) and TP14 (GND) to measure VDDQ voltage, V4 at TP12 (VTT) and TP13 (GND) to measure VTT voltage and V5 at TP17 (VTTREF) and TP18 (GND) to measure VTTREF voltage. Other Connections: Place a fan as shown in Figure 3 and turn it on, ensuring that air is flowing across the EVM. 5 Configurations 5.1 S3, S5 Enable Selection The controller can be enabled and disabled by switches SW1 and SW2. Default setting: Push SW1 and SW2 to the bottom (OFF position) to disable the controller. Table 2. S3, S5 Enable Selection State SW2 (S3) set to SW1(S5) set to VDDQ VTTREF VTT S0 ON position ON position ON ON ON S3 OFF position ON position ON ON OFF(High-Z) S4/S5 OFF position OFF position OFF(Discharge) OFF(Discharge) OFF(Discharge) 6 Test Procedure 6.1 Line/Load Regulation and Efficiency Measurement Procedure 1. Set up EVM as described in Section 4 and Figure 3. 2. Ensure that the load is set to constant-resistance mode and to sink 0 Adc. 3. Ensure that SW1 and SW2 are in the OFF position. 4. Increase V5IN from 0 V to 5 V. Use V1 to measure V5IN input voltage. 5. Increase VIN from 0 V to 12 V. Use V2 to measure VIN input voltage. 6. Push SW1 and SW2 to ON position to enable the controller. 7. Use V3 to measure VDDQ output voltage. 8. Use V4 to measure VTT output voltage. 9. Use V5 to measure VTTREF output voltage. 10. Use A1 to measure VIN input current for efficiency. 11. Use A2 to measure V5IN input current for efficiency. 12. Vary the load from 0 Adc to 20 Adc; VDDQ must remain in load regulation. 13. Vary VIN from 8 V to 20 V; VDDQ must remain in line regulation. 14. Push SW1 and SW2 to OFF position to disable the controller. 15. Decrease the load to 0 A. 16. Decrease VIN and V5IN to 0 V. 6.2 List of Test Points Table 3. Test Point Functions Test Points Name Description TP1 PGOOD Power Good TP2 V5IN 5-V input TP3 GND Ground 8 Using the TPS51916EVM-746 Complete DDR2, DDR3, DDR3L, and DDR4 SLUU526 – August 2011 Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered Submit Documentation Feedback Reference Copyright © 2011, Texas Instruments Incorporated |
Podobny numer części - CSD17303Q5 |
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Podobny opis - CSD17303Q5 |
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