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CDCLVC1103PW Arkusz danych(PDF) 3 Page - Texas Instruments

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Numer części CDCLVC1103PW
Szczegółowy opis  3.3 V and 2.5 V LVCMOS High-Performance Clock Buffer Family
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
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CDCLVC1103PW Arkusz danych(HTML) 3 Page - Texas Instruments

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CDCLVC11xx
www.ti.com
SCAS895 – MAY 2010
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE / UNIT
VDD
Supply voltage range
–0.5 V to 4.6 V
VIN
Input voltage range (2)
–0.5 V to VDD + 0.5 V
VO
Output voltage range (2)
–0.5 V to VDD + 0.5 V
IIN
Input current
±20 mA
IO
Continuous output current
±50 mA
TJ
Maximum junction temperature
125°C
TST
Storage temperature range
–65°C to 150°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
This value is limited to 4.6 V maximum.
THERMAL INFORMATION
DCDLVC1102/03/04
CDCLVC1106
CDCLVC1108
CDCLVC11010
CDCLVC1112
THERMAL METRIC(1)
PW
PW
PW
PW
PW
UNITS
8 PINS
14 PINS
16 PINS
20 PINS
24 PINS
qJA
Junction-to-ambient thermal resistance(2)
149.4
112.6
108.4
83.0
87.9
°C/W
qJC(top)
Junction-to-case(top) thermal resistance (3)
69.4
48.0
33.6
32.3
26.5
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
3.3 V supply
3.0
3.3
3.6
VDD
Supply voltage range
V
2.5 V supply
2.3
2.5
2.7
VDD = 3.0 V to 3.6 V
VDD/2 – 600
VIL
Low-level input voltage
mV
VDD = 2.3 V to 2.7 V
VDD/2 – 400
VDD = 3.0 V to 3.6 V
VDD/2 + 600
VIH
High-level input voltage
mV
VDD = 2.3 V to 2.7 V
VDD/2 + 400
Vth
Input threshold voltage
VDD = 2.3 V to 3.6 V
VDD/2
mV
tr / tf
Input slew rate
1
4
V/ns
VDD = 3.0 V to 3.6 V
1.8
Minimum pulse width at
tw
ns
CLKIN
VDD = 2.3 V to 2.7 V
2.75
VDD = 3.0 V to 3.6 V
DC
250
LVCMOS clock Input
fCLK
MHz
Frequency
VDD = 2.3 V to 2.7 V
DC
180
TA
Operating free-air temperature
–40
85
°C
Copyright © 2010, Texas Instruments Incorporated
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