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SN74ALVC16901DGGR Arkusz danych(PDF) 7 Page - Texas Instruments |
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SN74ALVC16901DGGR Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 9 page SN74ALVC16901 18BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCAS276A − NOVEMBER 1993 − REVISED JULY 1995 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V " 0.2 V VOH VOL th tsu From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 4.6 V Open GND 500 Ω 500 Ω tPLH tPHL Output Control (low-level enabling) Output Waveform 1 S1 at 4.6 V (see Note B) Output Waveform 2 S1 at GND (see Note B) tPZL tPZH tPLZ tPHZ 1.2 V 1.2 V 1.2 V 1.2 V 2.3 V 0 V 1.2 V 1.2 V VOH VOL 0 V 1.2 V VOL + 0.3 V 1.2 V VOH − 0.3 V 0 V 1.2 V 2.3 V 0 V 1.2 V 1.2 V 0 V 2.3 V 0 V 1.2 V 1.2 V tw Input 2.3 V 2.3 V 2.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES Timing Input Data Input Output Input tpd tPLZ/tPZL tPHZ/tPZH Open 4.6 V GND TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR v10 MHz, ZO = 50 Ω, trv2.5 ns, tfv2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms |
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