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TPIC5601DW Arkusz danych(PDF) 4 Page - Texas Instruments |
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TPIC5601DW Arkusz danych(HTML) 4 Page - Texas Instruments |
4 / 13 page TPIC5601 3PHASE BRIDGE POWER DMOS ARRAY SLIS022B − MARCH 1994 − REVISED OCTOBER 1995 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 resistive-load switching characteristics, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(on) Turn-on delay time 32 65 td(off) Turn-off delay time VDD = 25 V, RL = 25 Ω, tr1 = 10 ns, 40 80 ns tr2 Rise time VDD = 25 V, tf1 = 10 ns, RL = 25 Ω, See Figure 2 tr1 = 10 ns, 15 30 ns tf2 Fall time tf1 = 10 ns, See Figure 2 25 50 Qg Total gate charge VDS = 48 V, ID = 1 A, VGS = 10 V, 5 6 QGS Threshold gate-to-source charge VDS = 48 V, See Figure 3 ID = 1 A, VGS = 10 V, 0.5 0.6 nC QGD Gate-to-drain charge See Figure 3 1.9 2.3 nC L(drain) Internal drain inductance 5 nH L(source) Internal source inductance 5 nH Rg Internal gate resistance 0.25 Ω thermal resistance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RθJA Junction-to-ambient thermal resistance All outputs with equal power, See Note 4 90 °C/W RθJP Junction-to-pin thermal resistance All outputs with equal power, See Note 4 27 °C/W NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink. PARAMETER MEASUREMENT INFORMATION Reverse di/dt = 100 A/ µs trr(SD) † IRM(REC)= maximum recovery current 3 2 1 0 − 1 − 2 − 3 Time − ns 0 50 100 150 200 250 300 TJ = 25°C 25% of IRM† IRM(REC)† Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode |
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