Zakładka z wyszukiwarką danych komponentów |
|
74AUP1G57L6X Arkusz danych(PDF) 4 Page - Fairchild Semiconductor |
|
74AUP1G57L6X Arkusz danych(HTML) 4 Page - Fairchild Semiconductor |
4 / 11 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AUP1G57 • Rev. 1.0.4 4 74AUP1G57 Logic Configurations Figure 2 through Figure 8 show the logical functions that can be implemented using the 74AUP1G57. The diagrams show the DeMorgan’s equivalent logic duals for a given two-input function. The logical implementation is next to the board-level physical implementation of how the pins of the function should be connected. B Y C B Y C 1 2 3 6 5 4 B Y C VCC B Y C B Y C 1 2 3 6 5 4 B Y C VCC Figure 2. 2-Input AND Gate or 2-Input NOR with Both Inputs Inverted Figure 3. 2-Input NAND with Inverted B Input or 2-Input OR Gate with Inverted C Input A Y C A Y C 1 2 3 6 5 4 A Y C VCC A A Y C A Y C 1 2 3 6 5 4 Y C VCC Figure 4. 2-Input NAND with Inverted C Input or 2-Input OR Gate with Inverted A Input Figure 5. 2-Input NOR Gate or 2-Input AND Gate with Both Inputs Inverted B Y C 1 2 3 6 5 4 Y C VCC B 1 2 33 6 5 4 Y VCC Y A A Figure 6. 2-Input XNOR Gate Figure 7. Inverter 1 2 3 6 5 4 Y VCC Y B B Figure 8. Non-Inverter Buffer |
Podobny numer części - 74AUP1G57L6X |
|
Podobny opis - 74AUP1G57L6X |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |