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SI8620 Arkusz danych(PDF) 6 Page - Silicon Laboratories |
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SI8620 Arkusz danych(HTML) 6 Page - Silicon Laboratories |
6 / 36 page 6 Rev. 1.3 Si8610/20/21/22 10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs) Si8610Bx, Ex VDD1 VDD2 — — 1.2 1.2 2.0 2.0 mA Si8620Bx, Ex VDD1 VDD2 — — 2.1 2.2 3.1 3.3 mA Si8621Bx, Ex VDD1 VDD2 — — 2.2 2.2 3.3 3.3 mA Si8622Bx, Ex VDD1 VDD2 — — 3.7 4.4 5.5 6.7 mA 100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs) Si8610Bx, Ex VDD1 VDD2 — — 1.2 4.8 2.0 6.7 mA Si8620Bx, Ex VDD1 VDD2 — — 2.1 8.9 3.1 12.5 mA Si8621Bx, Ex VDD1 VDD2 — — 5.8 5.8 8.1 8.1 mA Si8622Bx, Ex VDD1 VDD2 — — 7.6 8.2 10.6 11.4 mA Timing Characteristics Si861x/2x Bx, Ex Maximum Data Rate 0 — 150 Mbps Minimum Pulse Width — — 5.0 ns Propagation Delay tPHL, tPLH See Figure 1 5.0 8.0 13 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 1 — 0.2 4.5 ns Propagation Delay Skew2 tPSK(P-P) —2.0 4.5 ns Channel-Channel Skew tPSK —0.4 2.5 ns Table 2. Electrical Characteristics (Continued) (VDD1 = 5 V ±10%, VDD2 = 5 V ±10%, TA =–40 to 125ºC) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. |
Podobny numer części - SI8620 |
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Podobny opis - SI8620 |
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