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AD1833 Arkusz danych(PDF) 5 Page - Analog Devices

Numer części AD1833
Szczegółowy opis  Multichannel 24-Bit, 192 kHz, DAC
Download  20 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD1833 Arkusz danych(HTML) 5 Page - Analog Devices

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AD1833
–5–
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
IN/OUT
Description
1
OUTLP1
O
DAC 1 Left Channel Positive Output.
2
OUTLN1
O
DAC 1 Left Channel Negative Output.
3, 4, 33, 34, 44
AVDD
Analog Supply.
5, 6, 7, 30, 31, 32, 41
AGND
Analog Ground.
8, 29
DGND
Digital Ground.
9
DVDD1
Digital Supply to Core Logic.
10
ZEROA
O
Flag to Indicate Zero Input on All Channels.
11
ZERO3R
O
Flag to Indicate Zero Input on Channel 3 Right.
12
ZERO3L
O
Flag to Indicate Zero Input on Channel 3 Left.
13
ZERO2R
O
Flag to Indicate Zero Input on Channel 2 Right.
14
CLATCH
I
Latch Input for Control Data (SPI Port).
15
CDATA
I
Serial Control Data Input (SPI Port).
16
CCLK
I
Clock Input for Control Data (SPI Port).
17
L/
RCLK
I/O
Left/Right Clock for DAC Data Input (FSTDM Output in TDM Mode).
18
BCLK
I/O
Bit Clock for DAC Data Input (BCLKTDM Output in TDM Mode).
19
MCLK
I
Master Clock Input.
20
SDIN1
I
Data Input for Channel 1 Left/Right (Data Stream Input in TDM
and Packed Modes).
21
SDIN2
I/O
Data Input for Channel 2 Left/Right (L/
RCLK Output to Auxiliary
DAC in TDM Mode).
22
SDIN3
I/O
Data Input for Channel 3 Left/Right (BCLK Output to Auxiliary
DAC in TDM Mode).
23
SOUT
O
Auxiliary I
2S Output (Available in TDM Mode).
24
ZERO2L
O
Flag to Indicate Zero Input on Channel 2 Left.
25
ZERO1R
O
Flag to Indicate Zero Input on Channel 1 Right.
26
ZERO1L
O
Flag to Indicate Zero Input on Channel 1 Left.
27
RESET
I
Power-Down and Reset Control.
28
DVDD2
Power Supply to External Interface Logic.
35
OUTRN1
O
DAC 1 Right Channel Negative Output.
36
OUTRP1
O
DAC 1 Right Channel Positive Output.
37
OUTRN2
O
DAC 2 Right Channel Negative Output.
38
OUTRP2
O
DAC 2 Right Channel Positive Output.
39
OUTRN3
O
DAC 3 Right Channel Negative Output.
40
OUTRP3
O
DAC 3 Right Channel Positive Output.
42
FILTR
Reference/Filter Capacitor Connection. Recommend 10
µF/100 µF
Decouple to Analog Ground.
43
FILTD
Filter Capacitor Connection. Recommend 10
µF/100 µF Decouple to
Analog Ground.
45
OUTLP3
O
DAC 3 Left Channel Positive Output.
46
OUTLN3
O
DAC 3 Left Channel Negative Output.
47
OUTLP2
O
DAC 2 Left Channel Positive Output.
48
OUTLN2
O
DAC 2 Left Channel Negative Output.
D15
D14
D0
tCHD
tCCH
tCSU
tCCL
CDATA
CCLK
CLATCH
tCLH
Figure 3. SPI Timing


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