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AD669BQ Arkusz danych(PDF) 7 Page - Analog Devices |
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AD669BQ Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 12 page AD669 REV. A –7– allows 5 V, 8.192 V and 10.24 V ranges to be used. For ex- ample, by using the AD586 5 V reference, outputs of 0 V to +5 V unipolar or ±5 V bipolar can be realized. Using the AD586 voltage reference makes it possible to operate the AD669 off of ±12 V supplies with 10% tolerances. Figure 5 shows the AD669 using the AD586 5 V reference in the bipolar configuration. This circuit includes two optional po- tentiometers and one optional resistor that can be used to adjust the gain, offset and bipolar zero errors in a manner similar to that described in the BIPOLAR CONFIGURATION section. Use –5.000000 V and +4.999847 as the output values. 50 Ω OUTPUT GND LDAC DB15 (MSB) (LSB) DB0 CS L1 –V EE +V CC +V LL AD669 22 7 6 5 23 27 2 14 3 26 25 R1 100 Ω R2 10k Ω 4 6 5 AD586 +V CC 28 REF IN REF OUT VOUT TRIM GND SPAN/BIP OFFSET 24 2 Figure 5. Using the AD669 with the AD586 5 V Reference USING THE AD669 WITH THE AD688 HIGH PRECISION VOLTAGE REFERENCE The AD669 is specified for gain drift from 15 ppm/ °C to 25 ppm/ °C (depending upon grade) using its internal 10 volt reference. Since the internal reference contributes the vast ma- jority of this drift, an external high precision voltage reference will greatly improve performance over temperature. As shown in Figure 6, the +10 volt output from the AD688 is used as the AD669 reference. With a 3 ppm/ °C drift over the industrial temperature range, the AD688 will improve the gain drift by a factor of 5 to a factor of 8 (depending upon the grade of the AD669 being used). Using this combination may result in ap- parent increases in initial gain error due to the differences between the internal reference by which the device is laser trimmed and the external reference with which the device is ac- tually applied. The AD669 internal reference is specified to be 10 volts ±20 mV whereas the AD688 is specified as 10 volts ±5 mV. This may result in an additional 5 mV (33 LSBs) of ap- parent initial gain error beyond the specified AD669 gain error. The circuit shown in Figure 6 also makes use of the –10 V AD688 output to allow the unipolar offset and gain to be ad- justed to zero in the manner described in the UNIPOLAR CONFIGURATION section. R2 100 Ω R3 20k R1 100 Ω LDAC DB15 (MSB) (LSB) DB0 CS L1 -VEE +VCC +VLL 16-BIT LATCH 10k AMP AD669 22 7 6 5 23 27 28 10V REF 2 1 4 3 26 24 10k 10.05k 16-BIT LATCH 16-BIT DAC 25 R4 10k Ω 7 6 3 1 14 15 2 16 5 10 8 12 11 13 R1 R2 R5 R6 R3 AD688 A3 A1 A4 A2 R4 RS 9 4 GND OUTPUT 0 TO +10V +V CC –V EE Figure 6. Using the AD669 with the AD688 High Precision ±10 V Reference |
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