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AD760AQ Arkusz danych(PDF) 11 Page - Analog Devices |
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AD760AQ Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 12 page AD760 REV. A –11– The HC11 generates the requisite 8 clock pulses with data valid on the rising edges. After the most significant byte is transmit- ted, the least significant byte (LSBY) is loaded from memory and transmitted in a similar fashion. To complete the transfer, the LDAC pin is driven high latching the complete 16-bit word into the AD760. INIT LDAA #$2F ;SS = 1; SCK = 0; MOSI = I STAA PORTD ;SEND TO SPI OUTPUTS LDAA #$38 ;SS , SCK,MOSI = OUTPUTS STAA DDRD ;SEND DATA DIRECTION INFO LDAA #$50 ;DABL INTRPTS,SPI IS MASTER & ON STAA SPCR ;CPOL=0, CPHA=0,1MHZ BAUD RATE NEXTPT LDAA MSBY ;LOAD ACCUM W/UPPER 8 BITS BSR SENDAT ;JUMP TO DAC OUTPUT ROUTINE JMP NEXTPT ;INFINITE LOOP SENDAT LDY #$1000 ;POINT AT ON-CHIP REGISTERS BCLR $08,Y,$20 ;DRIVE SS (LDAC) LOW STAA SPDR ;SEND MS-BYTE TO SPI DATA REG WAIT1 LDAA SPSR ;CHECK STATUE OF SPIE BPL WAIT1 ;POLL FOR END OF X-MISSION LDAA LSBY ;GET LOW 8 BITS FROM MEMORY STAA SPDR ;SEND LS-BYTE TO SPI DATA REG WAIT2 LDAA SPSR ;CHECK STATUS OF SPIE BPL WAIT2 ;POLL FOR END OF X-MISSION BSET $08,Y,$20 ;DRIV SS HIGH TO LATCH DATA RTS MOSI 68HC11 SS SIN LDAC SER AD760 SCK CS Figure 11. AD760 to 68HC11 (SPI) Interface AD760 TO MICROWIRE INTERFACE The flexible serial interface of the AD760 is also compatible with the National Semiconductor MICROWIRE* interface. The MICROWIRE* interface is used on microcontrollers such as the COP400 and COP800 series of processors. A generic in- terface to the MICROWIRE interface is shown in Figure 12. The G1, SK, and SO pins of the MICROWIRE interface are re- spectively connected to the LDAC, CS and SIN pins of the AD760. SIN LDAC SER AD760 SO SK MICROWIRE CS G1 Figure 12. AD760 to MICROWIRE Interface NOISE In high resolution systems, noise is often the limiting factor. A 16-bit DAC with a 10 volt span has an LSB size of 153 µV (–96 dB). Therefore, the noise must remain below this level in *MICROWIRE is a registered trademark of National Semiconductor. the frequency range of interest. The AD760’s noise spectral density is shown in Figures 13 and 14. Figure 13 shows the DAC output noise voltage spectral density for a 20 V span ex- cluding the reference. This figure shows the l/f corner frequency at 100 Hz and the wideband noise to be below 120 nV/ Hz. Figure 14 shows the reference wideband noise to be below 125 nV/ Hz. 1000 1 1 1M 100 10 10 100k 10k 1k 100 10M FREQUENCY – Hz Figure 13. DAC Output Noise Voltage Spectral Density 1000 1 1 1M 100 10 10 100k 10k 1k 100 10M FREQUENCY – Hz Figure 14. Reference Noise Voltage Spectral Density BOARD LAYOUT Designing with high resolution data converters requires careful attention to board layout. Trace impedance is the first issue. A 306 µA current through a 0.5 trace will develop a voltage drop of 153 µV, which is 1 LSB at the 16-bit level for a 10 V full-scale span. In addition to ground drops, inductive and ca- pacitive coupling need to be considered, especially when high accuracy analog signals share the same board with digital sig- nals. Finally, power supplies need to be decoupled in order to filter out ac noise. Analog and digital signals should not share a common path. Each signal should have an appropriate analog or digital return routed close to it. Using this approach, signal loops enclose a small area, minimizing the inductive coupling of noise. Wide PC tracks, large gauge wire, and ground planes are highly recom- mended to provide low impedance signal paths. Separate analog and digital ground planes should also be used, with a single in- terconnection point to minimize ground loops. Analog signals should be routed as far as possible from digital signals and should cross them at right angles. |
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