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AD8303 Arkusz danych(PDF) 11 Page - Analog Devices

Numer części AD8303
Szczegółowy opis  3 V, Dual, Serial Input Complete 12-Bit DAC
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Strona internetowa  http://www.analog.com
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AD8303 Arkusz danych(HTML) 11 Page - Analog Devices

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AD8303
REV. 0
–11–
SHUTDOWN (SHDN)
The shutdown feature is activated when SHDN is pulled low.
While the AD8303 is in shutdown mode, the voltage reference,
DACs, and output amplifiers are all turned off. Supply current
is less than 1
µA. The DAC output voltage goes to 0 V, pulled
to GND by the 12.5 k
Ω feedback resistors (Figure 22).
If power (i.e., VDD) is maintained to the AD8303 during
shutdown, the value stored in the DAC input latches will not
change. When the SHDN pin is driven high, the DACs will
return to the same voltages as before shutdown. The CMOS
logic section of the AD8303 remains active while SHDN is low.
Thus, new data can be loaded while the DACs are shut down
and, when SHDN goes high, the DACs will assume the new
output voltage. The AD8303 recovers from shutdown very
quickly. The voltage output settling time after shutdown is
typically only a few microseconds longer than the normal
settling time (Figure 20).
SDI
CLK
CS
LDA
LDB
RS
MSB
SHDN
AD8303
13
2, 14
14
4
1
VOUTA
VOUTB
+3V TO +5V
AGND DGND
VDD
500pF
2k
7
6
5
8
10
9
11
12
0.1µF
10µF
0V
≤ V
OUT ≤ 2.0475V
VOUTA, VOUTB
Figure 29. Unipolar Output Operation
UNIPOLAR OUTPUT OPERATION
This is the basic mode of operation for the AD8303. As shown
in Figure 29, the AD8303 has been designed to drive loads as
low as 2 k
Ω in parallel with 500 pF. The code table for this
operation is shown in Table II.
Table II. Unipolar Code Table
Hexadecimal Number Decimal Number
Analog Output
in DAC Register
in DAC Register
Voltage (V)
FFF
4095
2.0475
801
2049
1.0245
800
2048
1.024
7FF
2047
1.0235
000
0
0
GENERATING “BIPOLAR” OUTPUTS WITH A SINGLE
SUPPLY
To maximize output signal swings in single supply operation,
many circuit designs employ a “false-ground” configuration.
This method defines a voltage, usually at one half of full scale or
at one half of the power supply, as the “ground” reference.
Signals are then measured differentially from the false ground,
which produces a “quasi-bipolar” output swing.
The AD8303’s voltage reference output, combined with an op
amp, can provide a temperature compensated false-ground
reference, as shown in Figure 30. The op amp amplifies the
AD8303’s 1.0 V reference by 1.024 to provide an analog
common (false ground) at one-half scale (1.024 V). With this
method, the DAC output is
±1.024 V (referenced to the false
ground). The “Quasi-Bipolar” code table is given in Table III.
4
1
AD8303
13
2
3
VOUTA
VREF
+3V
AGND DGND
VDD
+3V
OP193
VOUT = ±1.024V
(REFERENCED TO
SIGNAL GROUND)
R2A
97.6k
1µF
0.022µF
R1
2.4k
SIGNAL GROUND
(FALSE GROUND, +1.024V)
100
R2B*
2k
*ZERO-SCALE TRIM
Figure 30. A False-Ground Generator
Table III. Quasi-Bipolar Code Table
DAC
Analog
Hexadecimal
Decimal
Output Common
“Bipolar”
Number
Number In
Voltage (False-Ground) Analog
in DAC Register DAC Register (V)
Voltage (V)
Voltage (V)
FFF
4095
2.0475
1.024
+1.2035
801
2049
1.0245
1.024
0.0005
800
2048
1.024
1.024
0
7FF
2047
1.0235
1.024
–0.0005
000
0
0
1.024
–1.024
Since the AD8303’s reference voltage output limits are typical, a
trim potentiometer is included so that the “false-ground” output
can be adjusted to exactly 1.024 V. To maintain accuracy,
resistors R1 and R2A must be of the same type (preferably
metal film) to insure temperature coefficient matching. The
circuit includes compensation to allow for a 1
µF bypass
capacitor at the false-ground output. The benefit of a large
capacitor is that not only does the false ground present a very
low dc resistance to the load, but its ac impedance is low as
well.


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