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AD876ARS Arkusz danych(PDF) 9 Page - Analog Devices |
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AD876ARS Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 16 page AD876 REV. B –9– Figure 16 shows the equivalent input structure for the AD876 reference pins. There is approximately 5 Ω of resistance between both the REFTF and REFBT pins and the reference ladder. If the force-sense connections are not used, the voltage drop across the 5 Ω resistors will result in a reduced voltage appear- ing across the ladder resistance. This reduces the input span of the converter. Applying a slightly larger span between the REFTF and REFBF pins compensates this error. Note that the tem- perature coefficients of the 5 Ω resistors are 1350 ppm. The user should consider the effects of temperature when not using a force-sense reference configuration. AD876 REFTF REFTS REFBS REFBF 5 DACS C (VIN) CLK CLK 5 V1 V2 250 RLADDER Figure 16. AD876 Equivalent Reference Structure Do not connect the REFTS and REFBS pins in configurations that do not use a force-sense reference. Connecting the force and sense lines together allows current to flow in the sense lines. Any current allowed to flow through these lines must be negligi- bly small. Current flow causes voltage drops across the resis- tance in the sense lines. Because the internal D/As of the AD876 tap different points along the sense lines, each D/A would receive a slightly different reference voltage if current were flowing in these wires. To avoid this undesirable condition, leave the sense lines unconnected. Any current allowed to flow through these lines must be negligibly small (<100 µA). The voltage drop across the internal resistor ladder determines the input span of the AD876. The driving voltages required at the V1 and V2 points are respectively +4 V and +2 V. Calculate the full-scale input span from the equation Input Span (V ) = REFTS – REFBS This results in a full-scale input span of approximately +2 V when REFTS = +4 V and REFBS = +2 V In order to maintain the requisite 2 V drop across the internal ladder, the external reference must be capable of providing approximately 8.0 mA. The user has flexibility in determining both the full-scale span of the analog input and where to center this voltage. Figure 17 shows the range over which the AD876 can operate without degrading the typical performance. 2.5 3.0 3.5 4.0 4.5 1.0 1.5 2.0 2.5 3.0 REFBF, REFBS (1.6, 4.5) (2.5, 4.5) (1.6, 3.5) (2.5, 3.5) Figure 17. AD876 Reference Ranges While the previous issues address the dc aspects of the AD876 reference, the user must also be aware of the dynamic imped- ance changes associated with the reference inputs. The simpli- fied diagram of Figure 16 shows that the reference pins connect to a capacitor for one-half of the clock period. The size of the capacitor is a function of the analog input voltage. The external reference must be able to maintain a low imped- ance over all frequencies of interest in order to provide the charge required by the capacitance. By supplying the requisite charge, the reference voltages will be relatively constant and perfor- mance will not degrade. For some reference configurations, voltage transients will be present on the reference lines; this is particularly true during the falling edge of CLK. It is impor- tant that the reference recovers from the transients and settles to the desired level of accuracy prior to the rising edges of CLK. There are several reference configurations suitable for the AD876 depending on the application, desired level of accuracy, and cost trade-offs. The simplest configuration, shown in Fig- ure 18, utilizes a resistor string to generate the reference volt- ages from the converter’s analog power supply. The 0.1 µF bypass capacitors effectively reduce high-frequency transients. The 10 µF capacitors act to reduce the impedances at the REFTF and REFBF pins at lower frequencies. As input fre- quencies approach dc, the capacitors become ineffective, and small voltage deviations will appear across the biasing resistors. This application can maintain 10-bit accuracy for input frequen- cies above approximately 200 Hz. 8-bit applications can use this circuit for input frequencies above approximately 50 Hz. +5V AD876 10 F 10 F 0.1 F 10 F 0.1 F 250 ( 1%) 2V NC NC 4V 140 ( 1%) 250 ( 15%) REFTS REFTF REFBF REFBS NC = NO CONNECT Figure 18. Low Cost Reference Circuit This reference configuration provides the lowest cost but has several disadvantages. These disadvantages include poor dc power supply rejection and poor accuracy due to the variability of the internal and external resistors. The AD876 offers force-sense reference connections to elimi- nate the voltage drops associated with the internal connections to the reference ladder. Figure 19 shows a suggested circuit using an AD826 dual, high speed op amp. This configuration uses 3.6 V and 1.6 V reference voltages for REFT and REFB, respectively. The connections shown in Figure 19 configure the op amps as voltage followers. |
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Podobny opis - AD876ARS |
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