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AD974AN Arkusz danych(PDF) 4 Page - Analog Devices |
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AD974AN Arkusz danych(HTML) 4 Page - Analog Devices |
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4 / 20 page  REV. A AD974 –4– CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD974 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE ABSOLUTE MAXIMUM RATINGS 1 Analog Inputs VxA, VxB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V CAP . . . . . . . . . . . . . . . . +VANA + 0.3 V to AGND2 – 0.3 V REF . . . . . . . . . . . . . . . . . . . . Indefinite Short to AGND2, Momentary Short to VANA Ground Voltage Differences DGND, AGND1, AGND2 . . . . . . . . . . . . . . . . . . . ±0.3 V Supply Voltages VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V VDIG to VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V VDIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V Digital Inputs . . . . . . . . . . . . . . . . . . . –0.3 V to VDIG + 0.3 V Internal Power Dissipation2 PDIP (N), SOIC (R), SSOP (RS) . . . . . . . . . . . . . 700 mW Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150 °C Storage Temperature Range N, R . . . . . . . . –65 °C to +150°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +300 °C NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Specification is for device in free air: 28-Lead PDIP: θ JA = 100°C/W, θJC = 31°C/W 28-Lead SOIC: θ JA = 75°C/W, θJC = 24°C/W 28-Lead SSOP: θ JA = 109°C/W, θJC = 39°C/W PIN CONFIGURATION SOIC, DIP AND SSOP TOP VIEW (Not to Scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 AD974 DGND EXT/ INT PWRD VDIG R/ C AGND2 REF AGND1 V3A V3B V4A CAP BIP V4B SYNC DATACLK DATA WR2 WR1 CS BUSY V2B V2A V1B V1A A1 A0 VANA TO OUTPUT PIN CL 100pF IOL +1.4V IOH 1.6mA 500 A Figure 1. Load Circuit for Digital Interface Timing ORDERING GUIDE Temperature Package Package Model Range Max INL Min S/(N+D) Description Options AD974AN –40 °C to +85°C ±3.0 LSB 83 dB 28-Lead Plastic DIP N-28B AD974BN –40 °C to +85°C ±2.0 LSB 85 dB 28-Lead Plastic DIP N-28B AD974AR –40 °C to +85°C ±3.0 LSB 83 dB 28-Lead SOIC R-28 AD974BR –40 °C to +85°C ±2.0 LSB 85 dB 28-Lead SOIC R-28 AD974ARS –40 °C to +85°C ±3.0 LSB 83 dB 28-Lead SSOP RS-28 AD974BRS –40 °C to +85°C ±2.0 LSB 85 dB 28-Lead SSOP RS-28 |
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