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AD9767 Arkusz danych(PDF) 10 Page - Analog Devices |
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AD9767 Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 27 page REV. B AD9767 –10– GAINCTRL MODE The AD9767 allows the gain of each channel to be indepen- dently set by connecting one RSET resistor to FSADJ1 and an- other RSET resistor to FSADJ2. To add flexibility and reduce system cost, a single RSET resistor can be used to set the gain of both channels simultaneously. When GAINCTRL is low (i.e., connected to AGND), the inde- pendent channel gain control mode using two resistors is enabled. In this mode, individual RSET resistors should be connected to FSADJ1 and FSADJ2. When GAINCTRL is high (i.e., con- nected to AVDD), the master/slave channel gain control mode using one resistor is enabled. In this mode, a single RSET resistor is connected to FSADJ1 and the resistor on FSADJ2 must be removed. NOTE: Only parts with date code of 9930 or later have the Master/Slave GAINCTRL function. For parts with a date code before 9930, Pin 42 must be connected to AGND, and the part will operate in the two resistor, independent gain control mode. REFERENCE CONTROL AMPLIFIER Both of the DACs in the AD9767 contain a control amplifier that is used to regulate the full-scale output current, IOUTFS. The control amplifier is configured as a V-I converter as shown in Figure 21, so that its current output, IREF, is determined by the ratio of the VREFIO and an external resistor, RSET, as stated in Equation 4. IREF is copied to the segmented current sources with the proper scale factor to set IOUTFS as stated in Equation 3. The control amplifier allows a wide (10:1) adjustment span of IOUTFS from 2 mA to 20 mA by setting IREF between 62.5 µA and 625 µA. The wide adjustment range of I OUTFS provides several benefits. The first relates directly to the power dissipa- tion of the AD9767, which is proportional to IOUTFS (refer to the Power Dissipation section). The second relates to the 20 dB adjustment, which is useful for system gain control purposes. The small signal bandwidth of the reference control amplifier is approximately 500 kHz and can be used for low frequency, small signal multiplying applications. DAC TRANSFER FUNCTION Both DACs in the AD9767 provide complementary current outputs, IOUTA and IOUTB. IOUTA will provide a near full-scale current output, IOUTFS, when all bits are high (i.e., DAC CODE = 16383) while IOUTB, the complementary output, provides no current. The current output appearing at IOUTA and IOUTB is a function of both the input code and IOUTFS and can be expressed as: IOUTA = (DAC CODE /16384) × I OUTFS (1) IOUTB = (16383 – DAC CODE)/16384) × I OUTFS (2) where DAC CODE = 0 to 16383 (i.e., Decimal Representation). As previously mentioned, IOUTFS is a function of the reference current IREF, which is nominally set by a reference voltage, VREFIO and external resistor RSET. It can be expressed as: IOUTFS = 32 × IREF (3) where IREF = VREFIO /RSET (4) The two current outputs will typically drive a resistive load di- rectly or via a transformer. If dc coupling is required, IOUTA and IOUTB should be directly connected to matching resistive loads, RLOAD, that are tied to analog common, ACOM. Note, RLOAD may represent the equivalent load resistance seen by IOUTA or IOUTB as would be the case in a doubly terminated 50 Ω or 75 Ω cable. The single-ended voltage output appearing at the IOUTA and IOUTB nodes is simply: VOUTA = IOUTA × RLOAD (5) VOUTB = IOUTB × RLOAD (6) Note the full-scale value of VOUTA and VOUTB should not exceed the specified output compliance range to maintain specified distortion and linearity performance. VDIFF = (IOUTA – IOUTB) × R LOAD (7) Substituting the values of IOUTA, IOUTB and IREF; VDIFF can be expressed as: VDIFF = {(2 × DAC CODE – 16383)/16384} × (32 × RLOAD/RSET) × VREFIO (8) These last two equations highlight some of the advantages of operating the AD9767 differentially. First, the differential opera- tion will help cancel common-mode error sources associated with IOUTA and IOUTB such as noise, distortion and dc offsets. Second, the differential code dependent current and subsequent voltage, VDIFF, is twice the value of the single-ended voltage output (i.e., VOUTA or VOUTB), thus providing twice the signal power to the load. Note, the gain drift temperature performance for a single-ended (VOUTA and VOUTB) or differential output (VDIFF) of the AD9767 can be enhanced by selecting temperature tracking resistors for RLOAD and RSET due to their ratiometric relationship as shown in Equation 8. ANALOG OUTPUTS The complementary current outputs in each DAC, IOUTA and IOUTB, may be configured for single-ended or differential opera- tion. IOUTA and IOUTB can be converted into complementary single-ended voltage outputs, VOUTA and VOUTB, via a load resis- tor, RLOAD, as described in the DAC Transfer Function section by Equations 5 through 8. The differential voltage, VDIFF, existing between VOUTA and VOUTB can also be converted to a single-ended voltage via a transformer or differential amplifier configuration. The ac performance of the AD9767 is optimum and specified using a differential transformer coupled output in which the voltage swing at IOUTA and IOUTB is limited to ±0.5 V. If a single-ended unipolar output is desirable, IOUTA should be selected. The distortion and noise performance of the AD9767 can be enhanced when it is configured for differential operation. The common-mode error sources of both IOUTA and IOUTB can be significantly reduced by the common-mode rejection of a trans- former or differential amplifier. These common-mode error sources include even-order distortion products and noise. The enhancement in distortion performance becomes more signifi- cant as the frequency content of the reconstructed waveform increases. This is due to the first order cancellation of various dynamic common-mode distortion mechanisms, digital feed- through and noise. |
Podobny numer części - AD9767 |
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Podobny opis - AD9767 |
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