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AD9816 Arkusz danych(PDF) 7 Page - Analog Devices |
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AD9816 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 16 page AD9816 –7– REV. A PIN FUNCTION DESCRIPTIONS Pin Pin Name Type Description 1 AVDD P +5 V Analog Supply. 2 AVSS P Analog Ground. 3, 4 CAPT AO Reference Decoupling. 5, 6 CAPB AO Reference Decoupling. 7 VREF AO Internal Reference Output. 8 CML AO Internal Bias Level. 9 VINR AI Analog Input, Red Channel. 10 AVSS P Analog Ground. 11 VING AI Analog Input, Green Channel. 12 AVSS P Analog Ground. 13 VINB AI Analog Input, Blue Channel. 14 AVSS P Analog Ground. 15 AVDD P +5 V Analog Supply. 16 OFFSET AI Clamp bias level in CDS mode. Offset adjustment input in SHA mode. 17 CDSCLK1 DI CDS Reset Level Sampling Clock. 18 CDSCLK2 DI CDS Data Level Sampling Clock. 19 ADCCLK DI A/D Converter Sampling Clock. 20 DVSS P Digital Ground. 21 DVDD P +5 V Digital Supply. 22 NC No Connect. 23 SCLK DI Clock Input for Serial Interface. 24 SDATA DIO Serial Data Input-Output. 25 SLOAD DI Load Pulse for Serial Interface. 26 DVSS P Digital Ground. 27 DB0 DO Data Output (LSB). 28–32 DB1–DB5 DO Data Outputs. 33 DRVSS P Digital Driver Ground. 34 DRVDD P Digital Driver Supply. 35–39 DB6–DB10 DO Data Outputs. 40 DB11 DO Data Output (MSB). 41 OEB DI Output Enable, Active Low. 42 NC No Connect. 43 PGAOUT_C AO PGA Output, Negative. This pin should be left unconnected except during evaluation. 44 PGAOUT_T AO PGA Output, Positive. This pin should be left unconnected except during evaluation. NOTES See Applications Information for circuit configurations. TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, DIO = Digital Input/Output, P = Power. PIN CONFIGURATION PIN 1 IDENTIFIER TOP VIEW (Not to Scale) NC = NO CONNECT DRVSS DB5 DB4 DB3 DB2 DB1 DB0 (LSB) DVSS SLOAD SDATA SCLK AVDD AVSS CAPT CAPT CAPB CAPB VREF CML VINR AVSS VING AD9816 34 35 36 37 38 39 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 33 32 31 30 29 28 27 26 25 24 23 |
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