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ADF4001BRU Arkusz danych(PDF) 3 Page - Analog Devices

Numer części ADF4001BRU
Szczegółowy opis  200 MHz Clock Generator PLL
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REV. 0
ADF4001
–3–
(AVDD = DVDD = 3 V
10%, 5 V
10%; AVDD
≤ VP ≤ 6.0 V ; AGND = DGND = CPGND= 0 V; RSET =
4.7 k
; TA = TMIN to TMAX unless otherwise noted; dBm referred to 50
.)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADF4001 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
t1
t2
t3
t4
t6
t5
DB20
(MSB)
DB19
DB2
DB1
(CONTROL BIT C2)
CLOCK
DATA
LE
LE
DB0 (LSB)
(CONTROL BIT C1)
Figure 1. Timing Diagram
TIMING CHARACTERISTICS
Limit at
TMIN to TMAX
Parameter
(B Version)
Unit
Test Conditions/Comments
t1
10
ns min
DATA to CLOCK Set Up Time
t2
10
ns min
DATA to CLOCK Hold Time
t3
25
ns min
CLOCK High Duration
t4
25
ns min
CLOCK Low Duration
t5
10
ns min
CLOCK to LE Set Up Time
t6
20
ns min
LE Pulsewidth
NOTES
Guaranteed by design but not production tested.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1, 2
(T
A = 25
°C unless otherwise noted)
AVDD to GND
3
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to + 0.3 V
VP to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VP to AVDD . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +5.5 V
Digital I/O Voltage to GND . . . . . . . . . –0.3 V to VDD + 0.3 V
Analog I/O Voltage to GND . . . . . . . . . . –0.3 V to VP + 0.3 V
REFIN, RFINA, RFINB to GND . . . . . . . –0.3 V to VDD + 0.3 V
RFINA to RFINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±320 mV
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . 150
°C
TSSOP
θJA Thermal Impedance . . . . . . . . . . . . . . 150.4°C/W
CSP
θJA Thermal Impedance (Paddle Soldered) . . . . 122°C/W
CSP
θ
JA Thermal Impedance (Paddle Not Soldered)
. . 216
°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2This device is a high-performance RF integrated circuit with an ESD rating of
< 2 k
Ω and it is ESD sensitive. Proper precautions should be taken for handling
and assembly.
3GND = AGND = DGND = 0 V.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADF4001BRU
–40
°C to +85°C
Thin Shrink Small Outline Package (TSSOP)
RU-16
ADF4001BCP
–40
°C to +85°C
Chip Scale Package
*
CP-20
*Contact factory for chip availability.


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