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ADM3311EARS-REEL25 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części ADM3311EARS-REEL25
Szczegółowy opis  15 kV ESD Protected, 2.7 V to 3.6 V Serial Port Transceiver with Green Idle?
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ADM3311EARS-REEL25 Arkusz danych(HTML) 8 Page - Analog Devices

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ADM3311E
–8–
REV. A
Transmitter (Driver) Section
The drivers convert 3.3 V logic input levels into EIA-232 output
levels. With VCC = +3.0 V and driving an EIA-232 load, the
output voltage swing is typically
±6.4 V.
Unused inputs may be left unconnected, as an internal 400 k
pull-up resistor pulls them high, forcing the outputs into a low
state. The input pull-up resistors typically source 8 A when
grounded, so unused inputs should either be connected to VCC
or left unconnected in order to minimize power consumption.
Receiver Section
The receivers are inverting level-shifters that accept RS-232
input levels and translate them into 3 V logic output levels.
The inputs have internal 5 k
Ω pull-down resistors to ground and
are also protected against overvoltages of up to
±30 V. Uncon-
nected inputs are pulled to 0 V by the internal 5 k
pull-down
resistor. This, therefore, results in a Logic 1 output level for
unconnected inputs or for inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.4 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
ENABLE AND SHUTDOWN
The enable function is intended to facilitate data bus connec-
tions where it is desirable to three-state the receiver outputs. In
the disabled mode, all receiver outputs are placed in a high
impedance state. The shutdown function is intended to shut the
device down, thereby minimizing the quiescent current. In shut-
down, all transmitters are disabled as are receivers R1 to R4.
Receiver R5 remains enabled in shutdown. Note that disabled
transmitters are not three-stated in shutdown, so it is not per-
mitted to connect multiple (RS-232) driver outputs together.
The shutdown feature is very useful in battery operated systems
since it reduces the power consumption to 0.06
µW. During
shutdown the charge pump is also disabled. When exiting shut-
down, the charge pump is restarted and it takes approximately
100
µs for it to reach its steady state operating condition.
RECEIVER
OUTPUT
EN INPUT
VOH – 0.1V
VOL + 0.1V
VOH
VOL
0V
3V
tDR
Figure 19. Receiver Disable Timing
RECEIVER
OUTPUT
EN INPUT
3V
0.4V
VOH
VOL
0V
3V
tER
Figure 20. Receiver Enable Timing
HIGH BAUD RATE
The ADM3311E features high slew rates permitting data trans-
mission at rates well in excess of the EIA/RS-232E specifications.
RS-232 voltage levels are maintained at data rates up to 460 kbps.
This allows for high speed data links between two terminals or
indeed it is suitable for the new generation ISDN modem stan-
dards which requires data rates of 230 kbps. The slew rate is
internally controlled to less than 30 V/
µs in order to minimize
EMI interference.
LAYOUT AND SUPPLY DECOUPLING
Because of the high frequencies at which the ADM3311E oscil-
lator operates, particular care should be taken with printed
circuit board layout, with all traces being as short as possible
and C1 to C5 being connected as close to the device as possible.
The use of a ground plane under and around the device is highly
recommended.
When the oscillator starts up during Green Idle operation, large
current pulses are taken from VCC. For this reason VCC should
be decoupled with a parallel combination of 1 F or greater
tantalum and 0.1
F ceramic capacitor, mounted as close to the
VCC pin as possible.
Capacitors C1 to C5 can have values between 0.1 F and 1
F,
larger values will give lower ripple. These capacitors can be
either electrolytic capacitors chosen for low equivalent series
resistance (ESR) or nonpolarized types, but the use of ceramic
types is highly recommended. If polarized electrolytic capacitors
are used, then polarity must be observed (as shown by C1+ for
example).
ESD/EFT TRANSIENT PROTECTION SCHEME
The ADM3311E uses protective clamping structures on all in-
puts and outputs, which clamps the voltage to a safe level and
dissipates the energy present in ESD (Electrostatic) and EFT
(Electrical Fast Transients) discharges. A simplified schematic of
the protection structure is shown below. Each input and output
contains two back-to-back high speed clamping diodes. During
normal operation with maximum RS-232 signal levels, the diodes
have no effect as one or the other is reverse biased, depending on
the polarity of the signal. If, however, the voltage exceeds about
±50 V, reverse breakdown occurs and the voltage is clamped
at this level. The diodes are large p-n junctions designed to
handle the instantaneous current surge, which can exceed
several amperes.
The transmitter outputs and receiver inputs have a similar pro-
tection structure. The receiver inputs can also dissipate some of
the energy through the internal 5 k
Ω resistor to GND as well as
through the protection diodes.
The protection structure achieves ESD protection up to
±15 kV
and EFT protection up to
±4 kV on all RS-232 I-O lines. The
methods used to test the protection scheme are discussed later.
RIN
Rx
D1
D2
RECEIVER
INPUT
Figure 21a. Receiver Input Protection Scheme


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