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ADSP-2191MBCA-140 Arkusz danych(PDF) 1 Page - Analog Devices

Numer części ADSP-2191MBCA-140
Szczegółowy opis  DSP Microcomputer
Download  52 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADSP-2191MBCA-140 Arkusz danych(HTML) 1 Page - Analog Devices

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a
DSP Microcomputer
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel:781/329-4700
www.analog.com
Fax:781/326-8703
©
Analog Devices, Inc., 2002
REV. 0
ADSP-2191M
PERFORMANCE FEATURES
6.25 ns Instruction Cycle Time, for up to 160 MIPS
Sustained Performance
ADSP-218x Family Code Compatible with the Same
Easy to Use Algebraic Syntax
Single-Cycle Instruction Execution
Single-Cycle Context Switch between Two Sets of Com-
putation and Memory Instructions
Instruction Cache Allows Dual Operand Fetches in Every
Instruction Cycle
Multifunction Instructions
Pipelined Architecture Supports Efficient Code
Execution
Architectural Enhancements for Compiled C and C++
Code Efficiency
Architectural Enhancements beyond ADSP-218x Family
are Supported with Instruction Set Extensions for
Added Registers, and Peripherals
Flexible Power Management with User-Selectable
Power-Down and Idle Modes
FUNCTIONAL BLOCK DIAGRAM
DATA
ADDRESS
DATA
ADDRESS
2
SYSTEM INTERRUPT CONTROLLER
I/O DATA
SERIAL PORTS
(3)
SPI PORTS
(2)
18
I/O REGISTERS
(MEMORY-MAPPED)
CONTROL
STATUS
BUFFERS
I/O PROCESSOR
CACHE
64
24-BIT
JTAG
TEST &
EMULATION
6
ADDR BUS
MUX
DATA BUS
MUX
16
22
PM ADDRESS BUS
DM ADDRESS BUS
PM DATA BUS
DM DATA BUS
PX
24
16
ADSP-219x
DSP CORE
PROGRAM
SEQUENCER
DATA
REGISTER
FILE
MULT
BARREL
SHIFTER
ALU
UART PORT
(1)
DMA
CONTROLLER
6
INPUT
REGISTERS
RESULT
REGISTERS
16
16-BIT
HOST PORT
24
DAG1
4
4
16
DAG2
4
4
16
INTERNAL MEMORY
24
24
ADDRESS
DATA
DATA
ADDRESS
24 BIT
16 BIT
16 BIT
FOUR INDEPENDENT BLOCKS
PROGRAMMABLE
FLAGS (16)
TIMERS (3)
3
DMA
CONNECT
DMA ADDRESS
EXTERNAL PORT
24 BIT
18
I/O ADDRESS
24
16
24
DMA DATA


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