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ADV7127KRU50 Arkusz danych(PDF) 4 Page - Analog Devices |
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ADV7127KRU50 Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 16 page –4– REV. 0 ADV7127–SPECIFICATIONS 3.3 V SOIC SPECIFICATIONS1 Parameter Min Typ Max Units Test Conditions STATIC PERFORMANCE Resolution (Each DAC) 10 Bits RSET = 680 Ω Integral Nonlinearity (BSL) –1 0.5 +1 LSB RSET = 680 Ω Differential Nonlinearity –1 0.25 +1 LSB RSET = 680 Ω DIGITAL AND CONTROL INPUTS Input High Voltage, VIH 2.0 V Input Low Voltage, VIL 0.8 V Input Current, IIN –1 +1 µAV IN = 0.0 V or VDD PSAVE Pull-Up Current 20 µA Input Capacitance, CIN 10 pF ANALOG OUTPUTS Output Current 2.0 18.5 mA Output Compliance Range, VOC 0 +1.4 V Output Impedance, ROUT 70 k Ω Output Capacitance, COUT 10 pF Offset Error 0 0 % FSR Tested with DAC Output = 0 V Gain Error3 0 % FSR FSR = 17.62 mA VOLTAGE REFERENCE (Ext.) Reference Range, VREF 1.12 1.235 1.35 V POWER DISSIPATION Digital Supply Current 4 2.2 5.0 mA fCLK = 50 MHz Digital Supply Current 4 6.5 12.0 mA fCLK = 140 MHz Digital Supply Current 4 11 15 mA fCLK = 240 MHz Analog Supply Current 32 35 mA RSET = 560 Ω Analog Supply Current 5 mA RSET = 4933 Ω Standby Supply Current 2.4 5.0 mA PSAVE = Low, Digital and Control Inputs at VDD Power Supply Rejection Ratio 0.1 0.5 %/% NOTES 1These max/min specifications are guaranteed by characterization to be over 3.0 V to 3.6 V range. 2Temperature range T MIN to TMAX: –40 °C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz. 3Gain error = ((Measured (FSC)/Ideal (FSC) –1) × 100) , where Ideal = V REF /RSET × K × (3FFH) and K = 7.9896. 4Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V DD. Specifications subject to change without notice. (VAA = +3.0 V–3.6 V, VREF = 1.235 V, RSET = 560 , CL = 10 pF. All specifications TMIN to TMAX 2 unless otherwise noted, TJ MAX = 110 C) |
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