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ADS4242 Arkusz danych(PDF) 2 Page - Texas Instruments |
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ADS4242 Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 66 page ADS42B49 SBAS558B – DECEMBER 2012 – REVISED JANUARY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) SPECIFIED PACKAGE- PACKAGE TEMPERATURE LEAD AND BALL PACKAGE ORDERING PRODUCT LEAD DESIGNATOR RANGE ECO PLAN (2) FINISH MARKING NUMBER TRANSPORT MEDIA ADS42B49IRGCT Tape and Reel GREEN (RoHS, ADS42B49 QFN-64 RGC –40°C to +85°C Cu/NiPdAu AZ42B49 no Sb/Br) ADS42B49IRGCR Tape and Reel (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Eco Plan is the planned eco-friendly classification. Green (RoHS, no Sb/Br): TI defines Green to mean Pb-Free (RoHS compatible) and free of Bromine- (Br) and Antimony- (Sb) based flame retardants. Refer to the Quality and Lead-Free (Pb-Free) Data web site for more information. The ADS42B49 is pin-compatible with the previous generation ADS62P49 data converter; this similar architecture enables easy migration. However, there are some important differences between the two device generations, summarized in Table 1. Table 1. Migrating from the ADS62P49 and ADS4249 ADS62P49 ADS4249 ADS42B49 PINS Pin 22 is NC (not connected). Pin 22 is AVDD (1.8 V) Pin 22 is AVDD (1.9 V) Must float. Pin 34 is AVDD (3.3 V) Pin 34 is AVDD (1.8 V) Pin 34 is AVDD_BUF (3.3 V) Pin 38 is DRVDD (1.8 V) Pin 38 is NC. Must float. Pin 38 is DRVDD (1.8 V) Pin 39 is DRGND Pin 39 is NC. Must float. Pin 39 is DRGND Pin 58 is DRVDD (1.8 V) Pin 58 is NC. Must float. Pin 58 is DRVDD (1.8 V) Pin 59 is DRGND Pin 59 is NC. Must float. Pin 59 is DRGND SUPPLY AVDD is 3.3 V AVDD is 1.8 V AVDD is 1.9 V DRVDD is 1.8 V DRVDD is 1.8 V DRVDD is 1.8 V AVDD_BUF is 3.3 V INPUT COMMON-MODE VOLTAGE CM is 1.5 V CM is 0.95 V CM is 1.9 V BIASING FOR INPUT PINS (INP, INM) INP and INM do not require external INP and INM must be externally NP and INM must be externally biased at 0.95 V biasing. Device internally biases these biased at 1.5 V pins to 1.9 V. EXTERNAL REFERENCE Supported Not supported Not supported PARALLEL CONFIGURATION SCLK pin controls internal and SCLK pin enables low-speed mode SCLK pin enables low-speed mode external reference mode 2 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: ADS42B49 |
Podobny numer części - ADS4242 |
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Podobny opis - ADS4242 |
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