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T8531A Arkusz danych(PDF) 35 Page - Agere Systems |
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T8531A Arkusz danych(HTML) 35 Page - Agere Systems |
35 / 50 page Agere Systems Inc. 35 Preliminary Data Sheet September 2001 Codec Chip Set T8531A/T8532 Multichannel Programmable Software Interface (continued) Table 19. T8531A Time-Slot Assignment Memory Map All registers can be written by the microprocessor interface. Table 20A. Bit Map for T8531A Time-Slot Assignment Registers at 0x1400—0x140F Table 20B. Bit Map for CTZ Disable and Null Channel Notes: X = Don’t care. Bits 4 and 5 default to 1 upon reset. Address Range Memory Contents 0x1400 Time slot 0 channel assignment 0x1401 Time slot 1 channel assignment 0x1402 Time slot 2 channel assignment 0x1403 Time slot 3 channel assignment 0x1404 Time slot 4 channel assignment 0x1405 Time slot 5 channel assignment 0x1406 Time slot 6 channel assignment 0x1407 Time slot 7 channel assignment 0x1408 Time slot 8 channel assignment 0x1409 Time slot 9 channel assignment 0x140A Time slot 10 channel assignment 0x140B Time slot 11 channel assignment 0x140C Time slot 12 channel assignment 0x140D Time slot 13 channel assignment 0x140E Time slot 14 channel assignment 0x140F Time slot 15 channel assignment Bit Number and Function 15—6 54321 0 Not used CTZ disable Null channel Binary-coded channel number 0—15 Bit 5 Bit 4 Function X 0 Disables null pointer X 1 Nulls channel 0 X Enables CTZ 1 X Disables CTZ |
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