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ADL5303ACPZ-R2 Arkusz danych(PDF) 11 Page - Analog Devices

Numer części ADL5303ACPZ-R2
Szczegółowy opis  160 dB Range 100 pA to 10 mA Low Cost Logarithmic Converter
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ADL5303ACPZ-R2 Arkusz danych(HTML) 11 Page - Analog Devices

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Data Sheet
ADL5303
Rev. 0 | Page 11 of 24
For an input of 1 nA, SNSD evaluates to almost 0.5 μV/√Hz;
assuming a 20 kHz bandwidth at this current, the integrated
noise voltage is 70 μV rms. However, this calculation is not
complete. The basic scaling of the VBE is approximately
3 mV/dB; translated to 10 mV/dB, the noise predicted by
Equation 7 must be multiplied by approximately 3.33. The
additive noise effects associated with the reference transistor,
Q2, and the temperature compensation circuitry must also be
included. The final voltage noise spectral density presented at
the VLOG pin varies inversely with IPD, but is not a simple
square root relationship. Figure 10 shows the measured noise
spectral density vs. frequency at the VLOG output, for the same
nine-decade spaced values of IPD.
CHIP ENABLE
Power down the ADL5303 by taking the PWDN pin to a high
logic level. The residual supply current in the disabled mode is
typically 60 μA.


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