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74ABT2952CMSA Arkusz danych(PDF) 1 Page - Fairchild Semiconductor |
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74ABT2952CMSA Arkusz danych(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 1999 Fairchild Semiconductor Corporation DS010969 www.fairchildsemi.com January 1992 Revised November 1999 74ABT2952 Octal Registered Transceiver General Description The ABT2952 is an octal registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA. Features s Separate clock, clock enable and 3-STATE output enable provided for each register s A and B output sink capability of 64 mA source capability of 32 mA s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF loads s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability Ordering Code: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Order Number Package Number Package Description 74ABT2952CSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ABT2952CMSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ABT2952CMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description A0–A7 A-Register Inputs/B-Register 3-STATE Outputs B0–B7 B-Register Inputs/A-Register 3-STATE Outputs OEA Output Enable A-Register CPA A-Register Clock CEA A-Register Clock Enable OEB Output Enable B-Register CPB B-Register Clock CEB B-Register Clock Enable |
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