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74ABT646CMTC Arkusz danych(PDF) 1 Page - Fairchild Semiconductor |
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74ABT646CMTC Arkusz danych(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page © 1999 Fairchild Semiconductor Corporation DS010978 www.fairchildsemi.com April 1992 Revised November 1999 74ABT646 Octal Transceivers and Registers with 3-STATE Outputs General Description The ABT646 consists of bus transceiver circuits with 3- STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control OE and direction pins are pro- vided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control OE is Active LOW. In the isolation mode (control OE HIGH), A data may be stored in the B register and/or B data may be stored in the A register. Features s Independent registers for A and B buses s Multiplexed real-time and stored data s A and B output sink capability of 64 mA, source capabil- ity of 32 mA s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF loads s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Order Number Package Number Package Description 74ABT646CSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 4.4mm Wide 74ABT646CMSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ABT646CMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description A0–A7 Data Register A Inputs/3-STATE Outputs B0–B7 Data Register B Inputs/3-STATE Outputs CPAB, CPBA Clock Pulse Inputs SAB, SBA Select Inputs OE Output Enable Input DIR Direction Control Input |
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