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74ACT16646SSC Arkusz danych(PDF) 2 Page - Fairchild Semiconductor |
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74ACT16646SSC Arkusz danych(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page www.fairchildsemi.com 2 Function Table H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level = LOW-to-HIGH Transition. Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control pins. Real Time Transfer A-Bus to B-Bus Real Time Transfer B-Bus to A-Bus Storage from Bus to Register Transfer from Register to Bus Logic Diagram Inputs Data I/O (Note 1) Output Operation Mode G1 DIR1 CPAB1 CPBA1 SAB1 SBA1 A0–7 B0–7 H X H or L H or L X X Isolation HX X X X Input Input Clock An Data into A Register HX X X X Clock Bn Data Into B Register LH X X L X An to Bn—Real Time (Transparent Mode) LH X L X Input Output Clock An Data to A Register L H H or L X H X A Register to Bn (Stored Mode) LH X H X Clock An Data into A Register and Output to Bn L L XXX L Bn to An—Real Time (Transparent Mode) LL X X L Output Input Clock Bn Data into B Register L L X H or L X H B Register to An (Stored Mode) LL X X H Clock Bn into B Register and Output to An |
Podobny numer części - 74ACT16646SSC |
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Podobny opis - 74ACT16646SSC |
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