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74F114 Arkusz danych(PDF) 4 Page - Fairchild Semiconductor

Numer części 74F114
Szczegółowy opis  Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74F114 Arkusz danych(HTML) 4 Page - Fairchild Semiconductor

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AC Electrical Characteristics
AC Operating Requirements
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
fMAX
Maximum Clock Frequency
75
95
70
MHz
tPLH
Propagation Delay
3.0
5.0
6.5
3.0
7.5
ns
tPHL
CP to Qn or Qn
3.0
5.5
7.5
3.0
8.5
tPLH
Propagation Delay
3.0
4.5
6.5
3.0
7.5
ns
tPHL
CDn or SDn to Qn or Qn
3.0
4.5
6.5
3.0
7.5
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
Min
Max
Min
Max
tS(H)
Setup Time, HIGH or LOW
4.0
5.0
ns
tS(L)
Jn or Kn to CP
3.0
3.5
tH(H)
Hold Time, HIGH or LOW
0
0
tH(L)
Jn or Kn to CP
00
tW(H)
CP Pulse Width
4.5
5.0
ns
tW(L)
HIGH or LOW
4.5
5.0
tW(L)
CDn or SDn Pulse Width,
4.5
5.0
ns
LOW
tREC
Recovery Time
4.0
5.0
ns
SDn, CDn, to CP


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