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ADXL001-70BEZ Arkusz danych(PDF) 13 Page - Analog Devices

Numer części ADXL001-70BEZ
Szczegółowy opis  High Performance, Wide Bandwidth Accelerometer
Download  16 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADXL001-70BEZ Arkusz danych(HTML) 13 Page - Analog Devices

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ADXL001
Rev. A | Page 13 of 16
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
CLOCK FREQUENCY SUPPLY RESPONSE
In any clocked system, power supply noise near the clock
frequency may have consequences at other frequencies. An
internal clock typically controls the sensor excitation and the
signal demodulator for micromachined accelerometers.
If the power supply contains high frequency spikes, they may be
demodulated and interpreted as acceleration signals. A signal
appears at the difference between the noise frequency and the
demodulator frequency. If the power supply noise is 100 Hz
away from the demodulator clock, there is an output term at
100 Hz. If the power supply clock is at exactly the same frequency
as the accelerometer clock, the term appears as an offset. If the
difference frequency is outside the signal bandwidth, the output
filter attenuates it. However, both the power supply clock and
the accelerometer clock may vary with time or temperature,
which can cause the interference signal to appear in the output
filter bandwidth.
The ADXL001 addresses this issue in two ways. First, the high
clock frequency, 125 kHz for the output stage, eases the task of
choosing a power supply clock frequency such that the difference
between it and the accelerometer clock remains well outside the
filter bandwidth. Second, the ADXL001 has a fully differential
signal path, including a pair of electrically isolated, mechanically
coupled sensors. The differential sensors eliminate most of the
power supply noise before it reaches the demodulator. Good
high frequency supply bypassing, such as a ceramic capacitor
close to the supply pins, also minimizes the amount of interference.
The clock frequency supply response (CFSR) is the ratio of the
response at the output to the noise on the power supply near the
accelerometer clock frequency or its harmonics. A CFSR of 0.9 V/V
means that the signal at the output is half the amplitude of the
supply noise. This is analogous to the power supply rejection
ratio (PSRR), except that the stimulus and the response are at
different frequencies.
POWER SUPPLY DECOUPLING
For most applications, a single 0.1 μF capacitor, CDC, adequately
decouples the accelerometer from noise on the power supply.
However, in some cases, particularly where noise is present at
the 1 MHz internal clock frequency (or any harmonic thereof),
noise on the supply can cause interference on the ADXL001
output. If additional decoupling is needed, a 50 Ω (or smaller)
resistor or ferrite bead can be inserted in the supply line.
Additionally, a larger bulk bypass capacitor (in the 1 μF to
4.7 μF range) can be added in parallel to CDC.
ELECTROMAGNETIC INTERFERENCE
The ADXL001 can be used in areas and applications with high
amounts of EMI or with components susceptible to EMI emissions.
The fully differential circuitry of the ADXL001 is designed to be
robust to such interference. For improved EMI performance,
especially in automotive applications, a 1000 pF output capacitor is
recommended on the XOUT output.


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