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74LVTH125SJX Arkusz danych(PDF) 1 Page - Fairchild Semiconductor |
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74LVTH125SJX Arkusz danych(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2005 Fairchild Semiconductor Corporation DS012011 www.fairchildsemi.com October 1998 Revised February 2005 74LVTH125 Low Voltage Quad Buffer with 3-STATE Outputs General Description The LVTH125 contains four independent non-inverting buffers with 3-STATE outputs. These buffers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL inter- face to a 5V environment. The LVTH125 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. Features s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink 32 mA/64 mA s Functionally compatible with the 74 series 125 s Latch-up performance exceeds 500 mA s ESD performance: Human-body model ! 2000V Machine model ! 200V Charged-device model ! 1000V Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDED J-STD-020B). Device available in Tape and Reel only. Order Number Package Package Description Number 74LVTH125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVTH125SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVTH125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVTH125MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
Podobny numer części - 74LVTH125SJX |
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Podobny opis - 74LVTH125SJX |
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