74LVX112 datasheet(4/7 Pages) FAIRCHILD

Numer części	74LVX112

Szczegółowy opis	Low Voltage Dual J-K Flip-Flops with Preset and Clear

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Producent	FAIRCHILD [Fairchild Semiconductor]

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4

AC Electrical Characteristics

Note 3: Parameter guaranteed by design. tOSLH = |tPLHm–tPLHn|, tOSLH = |tPHLm–tPHLn|

Capacitance

Note 4: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Symbol

Parameter

VCC

TA = +25°CTA = −40°C to +85°C

Units

CL (pF)

(V)

Min

Typ

Max

Min

Max

tPLH

Propagation Delay

2.7

7.5

12.0

1.0

14.2

ns

15

tPHL

CPn to Qn or Qn

11.0

16.7

1.0

19.0

50

3.3

± 0.3

8.5

11.0

1.0

13.4

15

10.0

15.0

1.0

16.5

50

tPLH

Propagation Delay

2.7

7.0

11.5

1.0

12.3

ns

15

tPHL

PR or CLR to Qn or Qn

10.1

14.3

1.0

16.5

50

3.3

± 0.3

6.7

10.2

1.0

11.7

15

9.7

13.5

1.0

15.0

50

tW

Pulse Width

2.7

5.0

ns

(CP or CLR or PR)

3.3

± 0.3

5.0

tS

Setup Time

2.7

5.5

ns

(Jn or Kn to CPn)3.3 ± 0.3

5.0

tH

Hold Time

2.7

1.0

ns

(Jn or Kn to CPn)3.3 ± 0.3

1.0

tREC

Recovery Time

2.7

6.5

ns

(CLR or PR to CP)

3.3

± 0.3

6.0

fMAX

Maximum Clock

2.7

90

140

85

MHz

15

Frequency

85

115

70

50

3.3

± 0.3

110

150

100

15

90

120

80

50

tOSLH,

Output to Output Skew

2.7

1.5

ns

50

tOSHL

(Note 3)

3.3

1.5

Symbol

Parameter

TA = +25°CTA = −40°C to +85°C

Units

Min

Typ

Max

Min

Max

CIN

Input Capacitance

4

10

pF

CPD

Power Dissipation

18

pF

Capacitance (Note 4)

Podobny numer części - 74LVX112

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74LVX112 Arkusz danych(PDF) 4 Page - Fairchild Semiconductor

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