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74LVX541SJX Arkusz danych(PDF) 1 Page - Fairchild Semiconductor |
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74LVX541SJX Arkusz danych(HTML) 1 Page - Fairchild Semiconductor |
1 / 5 page © 2005 Fairchild Semiconductor Corporation DS500291 www.fairchildsemi.com September 1999 Revised April 2005 74LVX541 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description The LVX541 is an octal non-inverting buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Logic Symbol IEEE/IEC Pin Descriptions Truth Table H HIGH Voltage Level X Immaterial L LOW Voltage Level Z High Impedance Order Number Package Number Package Description 74LVX541M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX541SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Descriptions OE1, OE2 3-STATE Output Enable Inputs I0 - I7 Inputs O0 - O7 3-STATE Outputs Inputs Outputs OE1 OE2 I LL H H HX X Z XHX Z LL LL |
Podobny numer części - 74LVX541SJX |
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Podobny opis - 74LVX541SJX |
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