© 2000 Fairchild Semiconductor Corporation

DS005945

www.fairchildsemi.com

October 1987

Revised June 2000

CD4010C

Hex Buffers (Non-Inverting)

General Description

The CD4010C hex buffers are monolithic complementary

MOS (CMOS) integrated circuits. The N- and P-channel

enhancement mode transistors provide a symmetrical cir-

cuit with output swings essentially equal to the supply volt-

age. This results in high noise immunity over a wide supply

voltage range. No DC power other than that caused by

leakage current is consumed during static conditions. All

inputs are protected against static discharge. These gates

may be used as hex buffers, CMOS to DTL or TTL inter-

face or as CMOS current drivers. Conversion ranges are

have buffered outputs which improve transfer characteris-

tics by providing very high gain.

Features

s Wide supply voltage range:

3.0V to 15V

s Low power: 100 nW (typ.)

capability:

Applications

• Automotive

• Data terminals

• Instrumentation

• Medical electronics

• Alarm system

• Industrial controls

• Remote metering

• Computers

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for DIP and SOIC

Top View

Schematic Diagram

Hex COS/MOS to DTL or TTL

converter (inverting).

Order Number

Package Number

Package Description

CD4010CM

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

CD4010CN

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide