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ADCLK925BCPZ-WP Arkusz danych(PDF) 6 Page - Analog Devices |
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ADCLK925BCPZ-WP Arkusz danych(HTML) 6 Page - Analog Devices |
6 / 16 page ADCLK905/ADCLK907/ADCLK925 Rev. 0 | Page 6 of 16 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR NC = NO CONNECT 1 D 2 D 3 NC 4 NC 11 Q 12 Q 10 NC 9NC ADCLK905 TOP VIEW (Not to Scale) Figure 4. ADCLK905 Pin Configuration Table 4. Pin Function Descriptions for 1:1 ADCLK905 Buffer Pin No. Mnemonic Description 1 D Noninverting Input. 2 D Inverting Input. 3, 4, 5, 6, 9, 10 NC No Connect. No physical connection to the die. 7, 14 VEE Negative Supply Voltage. 8, 13 VCC Positive Supply Voltage. 11 Q Inverting Output. 12 Q Noninverting Output. 15 VREF Reference Voltage. Reference voltage for biasing ac-coupled inputs. 16 VT Center Tap. Center tap of 100 Ω input resistor. Heat Sink NC No Connect. The metallic back surface of the package is not electrically connected to any part of the circuit. It can be left floating for optimal electrical isolation between the package handle and the substrate of the die. It can also be soldered to the application board if improved thermal and/or mechanical stability is desired. Exposed metal at the corners of the package is connected to this back surface. Allow sufficient clearance to vias and other components. PIN 1 INDICATOR 1 D1 2 D1 3 D2 4 D2 11 Q1 12 Q1 10 Q2 9Q2 ADCLK907 TOP VIEW (Not to Scale) Figure 5. ADCLK907 Pin Configuration Table 5. Pin Function Descriptions for Dual 1:1 ADCLK907 Buffer Pin No. Mnemonic Description 1 D1 Noninverting Input 1. 2 D1 Inverting Input 1. 3 D2 Noninverting Input 2. 4 D2 Inverting Input 2. 5 VT2 Center Tap 2. Center tap of 100 Ω input resistor, Channel 2. 6 VREF2 Reference Voltage 2. Reference voltage for biasing ac-coupled inputs, Channel 2. 7, 14 VEE Negative Supply Voltage. 8, 13 VCC Positive Supply Voltage. Pin 8 and Pin 13 are not strapped internally. 9 Q2 Inverting Output 2. |
Podobny numer części - ADCLK925BCPZ-WP |
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Podobny opis - ADCLK925BCPZ-WP |
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