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DM74LS112A Arkusz danych(PDF) 2 Page - Fairchild Semiconductor

Numer części DM74LS112A
Szczegółowy opis  Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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Absolute Maximum Ratings(Note 2)
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3: CL = 15 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.
Note 4: The symbol (
↓) indicates the falling edge of the clock pulse is used for reference.
Note 5: CL = 50 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
0
°C to +70°C
Storage Temperature Range
−65°C to +150°C
Symbol
Parameter
Min
Nom
Max
Units
VCC
Supply Voltage
4.75
5
5.25
V
VIH
HIGH Level Input Voltage
2
V
VIL
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−0.4
mA
IOL
LOW Level Output Current
8
mA
fCLK
Clock Frequency (Note 3)
0
30
MHz
fCLK
Clock Frequency (Note 5)
0
25
MHz
tW
Pulse Width
Clock HIGH
20
(Note 3)
Preset LOW
25
ns
Clear LOW
25
tW
Pulse Width
Clock HIGH
25
(Note 5)
Preset LOW
30
ns
Clear LOW
30
tSU
Setup Time (Note 3)(Note 4)
20
ns
tSU
Setup Time (Note 4)(Note 5)
25
ns
tH
Hold Time (Note 3)(Note 4)
0
ns
tH
Hold Time (Note 4)(Note 5)
5
ns
TA
Free Air Operating Temperature
0
70
°C


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