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DM74LS166M Arkusz danych(PDF) 4 Page - Fairchild Semiconductor |
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DM74LS166M Arkusz danych(HTML) 4 Page - Fairchild Semiconductor |
4 / 6 page www.fairchildsemi.com 4 Switching Characteristics at VCC = 5V and TA = 25°C Parameter Measurement Information Voltage Waveforms Test Table for Synchronous Inputs Note A: The clock pulse has the following characteristics: tW(clock) ≥ 20 ns and PRR = 1 MHz. The clear pulse has the following characteristics: tW(clear) ≥ 20 ns and tHOLD = 0 ns. When testing fMAX, vary the clock PRR. Note B: A clear pulse is applied prior to each test. Note C: Propagation delay times (tPLHand tPHL) are measured at tn+1. Proper shifting of data is verified at tn+8 with a functional test. Note D: tn = bit time before clocking transition tn+1 = bit time after one clocking transition tn+8 = bit time after eight clocking transitions Note E: VREF = 1.3V. From (Input) RL = 2 kΩ Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units Min Max Min Max fMAX Maximum Clock Frequency 25 20 MHz tPLH Propagation Delay Time Clock to Output 8 35 38 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Clock to Output 8 35 41 ns HIGH-to-LOW Level Output tPHL Propagation Delay Time Clear to Output 6 30 36 ns HIGH-to-LOW Level Output Data Input Shift/Load Output Tested for Test (See Note C) H0V QH at TN+1 Serial Input 4.5V QH at TN+8 |
Podobny numer części - DM74LS166M |
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Podobny opis - DM74LS166M |
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